A new basic unit for symmetric and asymmetric cascaded multilevel inverter with reduced number of components

Babaei, Ebrahim; Sarbanzadeh, Maryam; Hosseinzadeh, Mohammad Ali; Cecati, Carlo

doi:10.1109/iecon.2016.7793089

Cited by 15 publications

(8 citation statements)

References 14 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The basic unit of [21] produces 17 levels with four dc voltage sources and 12 switches. The topologies presented in [18]- [25] can be connected in cascade to achieve a higher number of levels at the output.…”

Section: Introductionmentioning

confidence: 99%

Optimal Design of a New Cascaded Multilevel Inverter Topology With Reduced Switch Count

et al. 2019

View full text Add to dashboard Cite

Multilevel inverters (MLIs) are a great development for industrial and renewable energy applications due to their dominance over conventional two-level inverter with respect to size, rating of switches, filter requirement, and efficiency. A new single-phase cascaded MLI topology is suggested in this paper. The proposed MLI topology is designed with the aim of reducing the number of switches and the number of dc voltage sources with modularity while having a higher number of levels at the output. For the determination of the magnitude of dc voltage sources and a number of levels in the cascade connection, three different algorithms are proposed. The optimization of the proposed topology is aimed at achieving a higher number of levels while minimizing other parameters. A detailed comparison is made with other comparable MLI topologies to prove the superiority of the proposed structure. A selective harmonic elimination pulse width modulation technique is used to produce the pulses for the switches to achieve high-quality voltage at the output. Finally, the experimental results are provided for the basic unit with 11 levels and for cascading of two such units to achieve 71 levels at the output. INDEX TERMS Basic unit, cascaded inverter, multilevel inverter (MLI), selective harmonic elimination, SHEPWM, optimization, reduce switch count. II. ANALYSIS AND DESCRIPTION OF PROPOSED MULTILEVEL TOPOLOGY A. BASIC UNIT OF PROPOSED TOPOLOGY

show abstract

Section: Introductionmentioning

confidence: 99%

Optimal Design of a New Cascaded Multilevel Inverter Topology With Reduced Switch Count

et al. 2019

View full text Add to dashboard Cite

show abstract

“…In the LSPWM method, each carrier signal's peak-topeak value (PPV) can be decided by using Eq. (19).…”

Section: Mc-pwm Technique Controls Symmetric/asymmetricmentioning

confidence: 99%

“…The CHB-MLI is easy to construct and highly dependable. This inverter has either a symmetrical or asymmetrical mode of operation [19], [20]. The symmetrical mode of CHB-MLI utilizes equal-amplitude DC sources.…”

Section: Introductionmentioning

confidence: 99%

MC-SPWM and MC-THIPWM Methods for Symmetric and Asymmetric Design of CHB-MLI: A Study

Patel¹,

Sood²

2022

J. Engg. Res. & Sci.

View full text Add to dashboard Cite

Cascaded H-bridge multilevel inverters (CHB-MLI) are employed in a variety of medium/high power applications. These inverters are known to inject unwanted harmonics into the grid, which negatively affects the grid and connected loads. CHB-MLI topology can reduce many of these harmonics by producing multiple output voltage levels and improves the fundamental component using a suitable modulation technique. However, the CHB-MLI topology configuration requires multiple isolated input sources which must be balanced either with the modulation technique or with an additional method. This paper analyzes multi-carrier pulse width modulation (MC-PWM) techniques for CHB-MLIs. In this study, two basic configurations of CHB-MLI symmetrical and asymmetrical are reviewed, followed by their mathematical analysis. Also, this paper analyses multicarrier based sinusoidal pulse width modulation (MC-SPWM) and multi-carrier based third-harmonic injected pulse width modulation (MC-THIPWM) techniques with phase-shifted (PS) and level-shifted (LS) carrier arrangements for the CHB-MLI. Moreover, a simulation study has been conducted using MATLAB Simulink to analyze the performance of MC-PWM techniques for the symmetrical and asymmetrical type CHB-MLIs. The 7-level and 9-level CHB-MLIs were evaluated for the stated MC-PWM techniques in terms of harmonics and fundamental components. In addition, discharging current of all input sources was checked to verify the ability of all MC-PWM techniques to balance all input sources.

show abstract

“…The cascaded multilevel inverter is divided into two groups: symmetric cascaded multilevel inverter and asymmetric cascade multilevel inverter. In the symmetric state, the magnitudes of all dc voltage sources are the same while in the asymmetric state the magnitudes of dc voltage sources are different [7], [8]. In the cascaded multilevel inverter, there are any many diodes clamped and flying capacitor.…”

Section: Introductionmentioning

confidence: 99%

A New Basic Unit for Symmetric and Asymmetric Cascaded Multilevel Inverters with Reduced Power Electronic Devices

Sarbanzadeh

Hosseinzadeh

Babaei

et al. 2019

2019 IEEE 28th International Symposium on Industrial Electronics (ISIE)

Self Cite

View full text Add to dashboard Cite

In this paper, a new basic unit for the cascaded multilevel inverter is proposed. By series-connected numbers of the proposed basic unit, a new cascaded multilevel inverter is also proposed. In order to generate all (even and odd) voltage levels two new algorithms to determine the magnitude of dc voltage sources are proposed. Then, this inverter is compared with several conventional cascaded multilevel inverters that have been presented in the literature. Based on these comparisons, the proposed inverter is able to generate a higher number of output levels by using a lower number of power electronic devices, dc voltage sources and minimum variety of the value of dc voltage sources. As a result, high efficiency, reducing the size and cost of the inverter is the other advantages of the proposed inverter. Finally, the accuracy performance of the proposed cascaded inverter to generate all voltage levels is verified through experimental results on a 49-level inverter in a laboratory prototype. Keywords-Basic unit; multilevel inverters; cascaded multilevel inverter; power electronic devices I.

show abstract

A new basic unit for symmetric and asymmetric cascaded multilevel inverter with reduced number of components

Cited by 15 publications

References 14 publications

Optimal Design of a New Cascaded Multilevel Inverter Topology With Reduced Switch Count

Optimal Design of a New Cascaded Multilevel Inverter Topology With Reduced Switch Count

MC-SPWM and MC-THIPWM Methods for Symmetric and Asymmetric Design of CHB-MLI: A Study

A New Basic Unit for Symmetric and Asymmetric Cascaded Multilevel Inverters with Reduced Power Electronic Devices

Contact Info

Product

Resources

About