A new current-mode receiver for high-speed electrical/optical link

Desai

Circuits Syst Signal Process

2011

Self Cite

In this work, a novel circuit topology for a Low-Voltage Differential Signaling (LVDS) output driver with reduced power consumption is proposed. Also, a low-signal current version of the LVDS driver working with lower supply voltage is proposed along with a compatible differential current-mode receiver. Both the drivers and the receiver feature active-terminated ports that eliminate the need for a dedicated passive terminator for matching. An asymmetric impedance network on the output side of the driver selectively eliminates any reflections coming from the channel while providing a high output impedance to the outgoing signal. For a target signal swing at the receiver input, the proposed termination scheme helps to reduce the driver signal current to up to a third of the current required by a conventional LVDS driver using a passive termination at the output. The asymmetric impedance network consists of a scaled-down replica driver that drives a common drain stage acting as the load for the main driver. The proposed driver topology meeting all LVDS specifications has been implemented in 3.3-V thick-gate CMOS technology. Simulation results show an achievable data rate of 5 Gb/s while transmitting over a 7.5-in FR4 PCB backplane trace for a target BER of 10 −15 , with power consumption equal to 17.8 mW, which is 25% less than a conventional LVDS driver with passive source end termination proCircuits Syst Signal Process (2012) 31:31-49 ducing the same voltage swing at the receiver input. The low-current version of the driver has been implemented in 0.18-µm 1.8-V digital CMOS technology and shows similar performance over the same channel with a power consumption of 4.5 mW.

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Section: Low-current Version Of Proposed Driver With Active-terminatementioning

confidence: 85%

Section: Active-terminated Differential Current-mode Receivermentioning

confidence: 99%

Section: Performance Of the Designmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A Low-Power 5-Gb/s Current-Mode LVDS Output Driver and Receiver with Active Termination

Desai

Circuits Syst Signal Process

2011

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“…To address the above issues, we propose low‐current differential signaling with current‐mode receiver 18. In this signaling, the signal current can be kept as low as few hundred µA's, since the input‐referred noise current in a current‐mode receiver is in the range of 1.4–4 µA for 10 Gb/s data transmission 16.…”

Section: Lcds With Active‐terminated Current‐mode Receivermentioning

confidence: 99%

Active‐terminated transmitter and receiver circuits for high‐speed low‐swing duobinary signaling

2010

Circuit Theory & Apps

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In this work, we propose transmitter and receiver circuits for high-speed, low-swing duobinary signaling over active-terminated chip-to-chip interconnect. In active-termination scheme port impedance of transmitter and receiver is matched with characteristic impedance of the interconnect. Elimination of the passive terminators helps in reducing the transmitted signal level without degrading the 0signal detectability of the receiver. High-speed current-mode receiver and transmitter circuits are designed, so that the input port impedance of the receiver and the output port impedance of the transmitter are matched with characteristic impedance of the link. These Tx-Rx pair is used to validate the proposed active-termination scheme. We also propose a duobinary precoder architecture suitable for high-speed operation and a low-power broadband equalizer topology for compensating the lossy long interconnect. The duobinary transmitter and receiver circuits are implemented in 1.8 V, 0.18 m Digital CMOS technology. The designed high-speed duobinary Tx/Rx circuits work up to 8 Gb/s speed while transmitting the data over 29.5 in. FR4 PCB trace for a targeted bit error rate (BER) of 10 −15 . The power consumed in the transmitter and receiver circuits is 42.9 mW at 8 Gb/s.

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Active terminated current-mode pre-emphasis transmitter for PCI Express standard

Banerjee

AEU - International Journal of Electronics and Communications

2011