“…Various researchers have proposed many stress techniques (Degraeve et al , 1999), but no consensus has been reached and no clear and convincing theory has been established yet to explain the real mechanism of oxide and channel degradation (Chen et al , 2002; Ohata, 2004). Because devices lifetime is a very important criterion in the electronic industry (Mourrain et al , 1998), it is becoming essential to investigate the electrical parameters degradation during ageing (Mu and Xu, 2001; Caster and Bandiera, 2004; Zhang and Yuan, 2001; Gouguenheim and Bravaix, 1999). In this paper, we will present experimental results on the effects of electrical constant voltage stress (CVS) on the switching delay times in power VDMOSFETs devices.…”