A new PLL frequency synthesizer with high switching speed

Abstract

In this paper, a new phase-locked loop (PLL) frequency synthesizer with high switching speed is proposed, and the experimental and theoretical results are given. Mobile communication networks are evolving towards micro cellulars operating in narrowband TDMA and microwave bands to meet the rapidly increasing demands for both voice and data services. Therefore, synthesizers with high switching speed are required for the realization. However, it will be difficult for conventional synthesizers to provide the switching time of shorter than 1 ms. The PLL synthesizer proposed here is composed entirely of digital signal processors except for a voltage-controlled oscillator (VCO). The VCO control signal is derived by the subtraction of the linear reference phase and the feedback phase, therefore, it does not need the band-limited loop filter which limits the ability of the loop to switch fast. The experimental results show that it can provide switching time as short as 0.1 ms, which is lo2 N lo3 times higher than conventional PLL synthesizers, and spurs of less than -60 dB.

All-Digital RF Phase-Locked Loops Exploiting Phase Prediction

“…At the fundamental level, the ADPLL shown in Fig. 1 (b) operates in the true phase domain [20], [21] by comparing the variable phase of the multi-GHz digitally-controlled oscillator (DCO) with the reference phase of the lower-frequency (e.g., 8-40 MHz) FREF clock of high longterm precision. The comparison result is a digital phase error which, after filtering by the digital loop filter, adjusts the DCO frequency in the negative feedback manner.…”

Challenges in integrated CMOS transceivers for short distance wireless

“…Kajiwara addresses the chief limitation of the traditional PLLbased frequency synthesizers (see Fig. 9), namely the slow frequency switching times, which make them less desirable for the advanced portable wireless applications that use spread spectrum and frequency hopping techniques [12]. On the other hand, the direct digital synthesizers, whose switching time is extremely fast, cannot be used in a direct manner at wireless frequencies.…”

Feedforward compensation technique for all digital phase locked loop based synthesizers

“…3. The input reference can be either a frequency control word (FCW) as in [5], or the output of a frequency to digital converter (FDC) or time to digital converter (TDC) similar to the one in the feed-back path as proposed in [5][6]. The phase-detector (PD) is just an adder, and the low pass filter (LPF) is a digital low-pass filter.…”

“…Other techniques that have been studied include, for example, the use of a non-linear element in the loop as in [2], and the use of binary search algorithms for ADPLL as in [3]. This paper proposes and analyzes the effects of direct feed-forwarding of the reference control signal for a class of phase-domain ADPLL structures described in [4][5][6] to speed up the settling time of the ADPLL. From this point forth, this system will be referred to as the feed-forward PLL, and should not be confused with PLL utilizing a feed-forward path in the loop filter as described in numerous references.…”