2015
DOI: 10.6113/jpe.2015.15.1.96
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A New Symmetric Multilevel Inverter Topology Using Single and Double Source Sub-Multilevel Inverters

Abstract: In recent years, the multilevel converters have been given more attention due to their modularity, reliability, failure management and multi stepped output waveform with less total harmonic distortion. This paper presents a novel symmetric multilevel inverter topology with reduced switching components to generate a high quality stepped sinusoidal voltage waveform. The series and parallel combinations of switches in the proposed topology reduce the total number of conducting switches in each level of output vol… Show more

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Cited by 39 publications
(19 citation statements)
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“…In Table , the comparison is carried out in terms of the generalized equation of different parameters for different topologies concerning the number of levels. The topology presented in Ramani et al utilizes the minimum number of switches, but it has full‐bridge inverter as polarity changer, which increases the blocking voltage on the switch. So it is difficult to use in high voltage applications.…”
Section: Comparison With Other Recent Developed Topologiesmentioning
confidence: 99%
See 1 more Smart Citation
“…In Table , the comparison is carried out in terms of the generalized equation of different parameters for different topologies concerning the number of levels. The topology presented in Ramani et al utilizes the minimum number of switches, but it has full‐bridge inverter as polarity changer, which increases the blocking voltage on the switch. So it is difficult to use in high voltage applications.…”
Section: Comparison With Other Recent Developed Topologiesmentioning
confidence: 99%
“…Another MLI topology has been developed with sub‐MLI in symmetric condition and cascaded method in asymmetric condition to produce a higher number of output voltage levels with reduced switches and dc sources. However, these cascaded topologies have been optimized to achieve the maximum number of level when utilizing the minimum number of dc source, switches, gate driver circuits, and blocking voltage in previous studies .…”
Section: Introductionmentioning
confidence: 99%
“…For any inverter, the efficiency calculation is necessary because it is the performance factor when different fractions of loads are considered [17]. The following is the formula for the efficiency calculation when the output and input power are known.…”
Section: B Efficiency Calculation For 17-level Invertermentioning
confidence: 99%
“…The proposed basic symmetric multilevel inverter presented in [19] comprises a single and double source unit (Fig. 1).…”
Section: Basic Unitmentioning
confidence: 99%
“…The general form of the k sub-module dc voltage sources is (19) As clearly shown in Fig. 8, the maximum number of voltage steps are obtained from n=1.…”
Section: B Optimization Of the Proposed Cascaded Topology For The Mamentioning
confidence: 99%