A new synthesis methodology for reliable RF front-end Design

Abstract

A low power and low cost WLAN/WiMAX RF frontend requires more advanced CMOS technologies whose transistor parameters degradation is becoming worse. Few published works has presented the reliability results for RF circuits. In order to fill this gap, we develop a new synthesis methodology for reliable RF front-end design using the design example of a reliable BLIXER. The first steps of our synthesis methodology is a transistor ageing simulation. Then, we calculate an estimation of the circuit performance and ageing using the circuit design equations and the total derivatives. Thus, we can find the required bias and sizing improving the circuit reliability.The simulation results of the typical circuit are coherent with the WLAN/WiMAX RF front-end specifications. Despite the integrated process variability and mismatch, we observe that 96.4 % of the simulation runs have Gain > 10.0 dB, and 92.1% of the simulation runs have NF max < 5.0 dB. Moreover, the BLIXER ageing degradation is negligible according to the fitted Poisson distribution of the power consumption for 99.9% of confidence. Going further, we can say that the synthesis methodology proposed and developed for a RF front-end design can be exploited in different AMS/RF circuits and also generalized for a single bottomup reliable-system design approach.

MOSFET degradation dependence on input signal power in a RF power amplifier

“…Thus, most experimental works about aging on RF amplifiers choose onetransistor based-circuits where the access terminals for transistor and circuit are coincident [2,3,4]. In other works, the performance degradation of RF circuits containing multiple transistors is simply predicted by means of simulation, based on models of aged transistors that were first experimentally stressed and characterized [5,6,7]. The use of transistor models characterized after DC stress alone ignores the contribution of the RF signal component on the circuit degradation, which is particularly relevant in power amplifiers that usually suffer high input powers.…”

Transconductance/drain current based sensitivity analysis for analog CMOS integrated circuits

“…Equation 6 has the form of the formula for calculating the effective resistance of two resistors in parallel, therefore the A V is determined primarily by the smaller of g m /g ds and g m R D . Equation 6 can be re-written to shown the dependence of |A V | on g m /I D , as…”

“…Recent studies have shown that variability and ageing phenomena are responsible for variation of g m and I D [6] and ultimately circuit reliability [5]. We are not aware of any published work linking a g m /I D analysis to g m /I D variation.…”

1.4 V and 300 nA UHF passive RFID voltage regulator

“…BTI degradation is also increased by high temperature, but the maximum 80 o C stress implies in not significant temperature stress. Thus, HCI and BTI ageing can be neglected for the voltage regulator if is guaranteed the low bias and moderate temperature [5].…”