A new technique for SET pulse width measurement in chains of inverters using pulsed laser irradiation

Ferlet-Cavrois,; McMorrow,; Kobayashi, Kazuya; Fel,; Melinger,; Paillet,; Pouget,; Essely,; Baggio,; Girard, Éric; Flores, Paulo; Schwank,; Dodd,; Shaneyfelt,; Hirose,; Saito,

doi:10.1109/radecs.2008.5782706

Cited by 3 publications

(4 citation statements)

References 22 publications

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“…18) Some researchers report that the pulse modulation amount is less than 2 ps per inverter. [18][19][20][21] We assume that the modulation amount is less than 100 ps even if the SET pulse is injected in the first inverter of the implemented inverter chain.…”

Section: Set Pulse Width Measurement Circuitmentioning

confidence: 99%

Radiation hardness evaluations of 65 nm fully depleted silicon on insulator and bulk processes by measuring single event transient pulse widths and single event upset rates

Furuta

Sonezaki²,

Kobayashi³

2015

Jpn. J. Appl. Phys.

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We measure single event transient (SET) pulse widths on inverter chains and single event upset (SEU) rates on flip-flops (FFs) fabricated in 65 nm fully depleted silicon on insulator (FD-SOI) and bulk processes. The layout designs of test chips are strictly identical between their processes besides buried oxide (BOX) layers. Experimental results show that neutron-induced SEU and SET rates in the FD-SOI process are 230' and 450' lower than those in the bulk process, respectively.

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Section: Set Pulse Width Measurement Circuitmentioning

confidence: 99%

Radiation hardness evaluations of 65 nm fully depleted silicon on insulator and bulk processes by measuring single event transient pulse widths and single event upset rates

Furuta

Sonezaki²,

Kobayashi³

2015

Jpn. J. Appl. Phys.

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“…However, the simplicity of measurement and required equipments and skills are much different, and hence [11] is not discussed further in this paper.…”

Section: R5: Certainty Of Measured Widthmentioning

confidence: 99%

“…Meanwhile, several circuits have been proposed and successfully used for measuring the SET pulse width [8][9][10][11]. They directly measure the pulse width of each SET [8,9,11], or indirectly estimate the distribution of the SET pulse width from the statistic of SET errors [10].…”

Section: Introductionmentioning

confidence: 99%

Measurement Circuits for Acquiring SET Pulse Width Distribution with Sub-FO1-Inverter-Delay Resolution

Harada

Mitsuyama

Hashimoto

et al. 2010

IEICE Trans. Fundamentals

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Abstract-This paper presents two circuits to measure pulse width distribution of single event transients (SETs). We first review requirements for SET measurement in accelerated neutron radiation test and point out problems of previous works, in terms of time resolution, time/area efficiency for obtaining large samples and certainty in absolute values of pulse width. We then devise two measurement circuits and a pulse generator circuit that satisfy all the requirements and attain sub-FO1-inverter-delay resolution, and propose a measurement procedure for assuring the absolute width values. The operation of one of the proposed circuits was confirmed by a preliminary radiation experiment of alpha particles with a fabricated test chip.

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“…The use of advanced COTS CMOS in space-based applications has given rise to new soft error experimental and modeling evaluation techniques [5,[9][10][11][12][13][14] to overcome these challenges.…”

Section: Introductionmentioning

confidence: 99%

Practicality of evaluating soft errors in commercial sub-90 nm CMOS for space applications

Pellish

LaBel

2010

2010 IEEE International Reliability Physics Symposium

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Abstract-Inclusion of commercial technologies in civil spaceflight applications is reality. These technologies enable higher performance, reduce power consumption, and ultimately yield better science. However, the benefits do not come without cost, and radiation-induced soft errors in advanced, sub-90 nm CMOS technologies present new challenges. These challenges include sensitivity to proton direct ionization, memory technology evaluation, as well as testing and evaluation complexity.

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A new technique for SET pulse width measurement in chains of inverters using pulsed laser irradiation

Cited by 3 publications

References 22 publications

Radiation hardness evaluations of 65 nm fully depleted silicon on insulator and bulk processes by measuring single event transient pulse widths and single event upset rates

Radiation hardness evaluations of 65 nm fully depleted silicon on insulator and bulk processes by measuring single event transient pulse widths and single event upset rates

Measurement Circuits for Acquiring SET Pulse Width Distribution with Sub-FO1-Inverter-Delay Resolution

Practicality of evaluating soft errors in commercial sub-90 nm CMOS for space applications

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