A new two dimensional analytical breakdown model of SOI RESURF devices

Abstract

In this paper, a new breakdown model of SOI electrostatic potentials and electric fields for both the RESURF devices is proposed based on solving 2-D Poisson completely and incompletely depleted drift region. The equation. The approach explores the physical insights of the availability of the model is verified by the fair agreement lateral and vertical breakdowns for both of the completely and between the analytical results and numerical simulations. At incompletely depleted drift regions. Analytical 2-D electrostatic last, as an application of the model, 220V LDMOSFET is potential and electric fields distributions are compared with designed and fabricated on a SOI wafer with a 3gm-thick top the simulating results by MEDICI, The impacts of the Si layer and a 1.5gm-thick buried oxide layer. geometry parameters on the breakdown voltage are also investigated by the analytical model and numerical simulation. A well agreement between the analytical and simulating results II. ANALAYTICAL MODEL proofs the availability of the model. Finally, as a further A schematic cross section of a basic SOI RESUR-F device experimental verification, LDMOS with a breakdown voltage is illustrated in Fig. 1. Such a device can be considered as a of 220V was fabricated on a bonding SOI wafer with a top composite of a lateral P+N diode and a vertical SIS (Siliconsilicon thickness of 3.O1m and a buried oxide thickness of Insulate-Silicon) structure. Under the reverse-biased applied 1.5*m. voltage V a lateral space charge depletion region extends aprf rom the P N junction to the N+N junction, while a vertical

Simulation Details for the Electrical Field Distribution and Breakdown Voltage of 0.15μThin Film SOI Power Device

“…The high lateral electric field caused by the crowded equipotential voltage lines near the ends of the drift region in the conventional single RESURF LDMOS can be improved by an optimal lateral linear doping drift region reported in the previous papers [1,2,3] . A novel LDMOS device with a variation in the lateral doping (VLD) of drift regions is demonstrated in a thin film silicon-on-oxide (SOI) technology [4,5].…”