A Noise-Coupled Time-Interleaved ¿¿ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR

Lee, Kyehyung; Chae, Jeongseok; Aniya, M.; Hamashita, Koichi; Takasuka, K.; Takeuchi, Shigeyuki; Temes, Gábor C.

doi:10.1109/isscc.2008.4523273

Cited by 20 publications

(6 citation statements)

References 3 publications

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“…Unlike traditional delta-sigma modulator where path-coupling [6] or feeding back the quantization error [8] requires a dedicated DAC and added complexity, in the proposed structure this value is available at the end of the discharging phase of the noise-shaped quantizer. This makes it very convenient to utilize path coupling technique.…”

Section: Proposed Double-sampled Path-coupled Dsmmentioning

confidence: 99%

“…Same analysis as (3) can be driven to show that with k=2, the final noise transfer function would be 1 3 (1 ) . NTF z − = − (6) The achieved third order noise shaping comes with minimal additional hardware: only a pair of capacitors to sample the output of each quantizer and feed it into the alternative path. Note that there would be a minimum of half-delay between the pathcoupling operation.…”

Section: Proposed Double-sampled Path-coupled Dsmmentioning

confidence: 99%

“…This paper presents a double-sampled single-loop modulator using both noise-shaped integrating quantizer and the pathcoupling [6]. This structure eliminates the use of the power hungry flash ADCs and effectively replaces them with a single comparator.…”

Section: Introductionmentioning

confidence: 99%

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A double-sampled path-coupled single-loop ΣΔ modulator using noise-shaped integrating quantizer

Maghari

Moon

2010

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

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A single-loop delta-sigma modulator based on pathcoupling and double-sampling is proposed. This modulator employs a noise-shaped integrating quantizer which by itself increases the order of noise shaping by one. The integrating quantizer used in this structure holds its quantization error at the end of the evaluation phase, and hence this voltage is available in purely analog form and eliminates the need for extra DACs. This enables to utilize local path-coupling which adds another order of noise shaping. A third order example is provided and simulated to demonstrate the efficiency of this structure.

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Section: Proposed Double-sampled Path-coupled Dsmmentioning

confidence: 99%

Section: Proposed Double-sampled Path-coupled Dsmmentioning

confidence: 99%

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A double-sampled path-coupled single-loop ΣΔ modulator using noise-shaped integrating quantizer

Maghari

Moon

2010

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

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“…Furthermore, while a multibit quantizer is used for the modulator, the quantization noise can be assumed under busy signal conditions, which reduces tones and harmonic spurs. Thus, the noise coupling method can raise the order of a noise transfer function, at the same time, and the stability condition of the original modulator is preserved in the multibit modulator (7) . Fig.3 shows a ΔΣAD modulator which consists of two discrete integrators and a noise-coupling structure.…”

Section: Noise-coupled δσAd Modulatormentioning

confidence: 99%

Noise-Coupled .DELTA..SIGMA.AD Modulator with Shared OP-Amp

et al. 2009

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This paper proposes an improved architecture of the noise-coupled ΔΣAD modulator with OP-Amp sharing technique. The noise-coupled ΔΣAD modulator enhances the order of noise-shaping efficiently by adding some passive capacitors and switches. However, in a conventional noise-coupled ΔΣAD modulator with feedforward path, an analog adder is needed before the quantizer, and especially in a multibit modulator, an additional amplifier is necessary to realize the summation of feedforward signals and coupled quantization noise, which leads to extra chip area and power dissipation. In this paper, we propose a novel architecture of the noise-coupled ΔΣAD modulator with OP-Amp sharing technique, which realizes the summation of feedforward signals and coupled quantization noise without an additional amplifier. The proposed architecture is functionally equivalent to the conventional noise-coupled modulator with smaller chip area and low power dissipation. We have performed simulation with MATLAB and SPICE to verify the effectiveness of the proposed architecture and modulator circuits. The simulation results show that the proposed modulator can realize the noise-shaping enhancement effectually as the same as the conventional noise-coupled modulator with small overhead.

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“…These structures may be used as standalone ADCs or as the quantizer in a delta-sigma loop. Moreover, because the modified discharging extracts the quantization error in the analog domain, possibilities exist for further performance improvements [4].…”

mentioning

confidence: 99%

A third-order DT ΔΣ modulator using noise-shaped bidirectional single-slope quantizer

Maghari

Moon

2011

2011 IEEE International Solid-State Circuits Conference

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The aspirations for power efficient ADCs have led to many improvements in this area. In delta-sigma modulators, techniques such as VCO-based quantizer [1,2] and time-domain quantization [3] have been proposed to enhance the overall performance. The former provides additional noise shaping and the latter eliminates the need for the flash ADC. However, in addition to process and temperature variations, the inherent nonlinear behavior of the VCO requires careful attention. The time-domain quantization technique is an efficient way to utilize the quantizer but it does not improve the noise-shaping property. In this paper, we describe modified dual-slope and single-slope ADCs using bidirectional discharging. With a small modification in the discharging phase of these types of ADCs, a first-order quantization noise shaping is attained. These structures may be used as standalone ADCs or as the quantizer in a delta-sigma loop. Moreover, because the modified discharging extracts the quantization error in the analog domain, possibilities exist for further performance improvements [4].The basic operations of the traditional unidirectional dual-slope ADC and the proposed noise-shaped one are shown in Fig. 27.3.1. The input signal is sampled via a resistor in Φ 2 and is discharged in Φ 1 . During the discharging period, a high-speed clock is fed to a digital counter and is incremented. A continuoustime comparator is used to detect the zero crossing of the output and terminates the discharging period. The number of clock pulses fed to the digital counter during the discharging represents the quantized input signal. In the traditional discharging, the termination of the discharge pulse is right at the zero-crossing instance. The proposed discharging technique will continue the discharging until the next edge of the counting clock after the zero crossing. In this fashion, the value stored on the integrator is half-LSB minus the quantization error of the current sample. The next sample of the signal is added to this shifted quantization error before the next discharging phase. Hence, the final digital output code will be (1) showing a first-order noise shaping of the quantization error. The half-LSB offset is a fixed value and can be removed either in the digital or the analog domain. The input sampling via a resistor can provide first-order anti-aliasing for a standalone ADC. However, if this quantizer is to be used in a delta-sigma modulator, it requires a fixed sampled data during its sampling period so that the loop characteristics are not affected. If the discharging is always done in one direction as illustrated, careful common-mode biasing and input sampling are also needed to make sure the output of the opamp always stays above the comparator reference.To overcome these issues, single-slope sampling with bidirectional discharging is proposed. In this implementation, the input is sampled via a switched-capacitor branch to avoid unnecessary windowing of the input. In the discharging phase, the differential output polarity o...

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A Noise-Coupled Time-Interleaved ¿¿ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR

Cited by 20 publications

References 3 publications

A double-sampled path-coupled single-loop ΣΔ modulator using noise-shaped integrating quantizer

A double-sampled path-coupled single-loop ΣΔ modulator using noise-shaped integrating quantizer

Noise-Coupled .DELTA..SIGMA.AD Modulator with Shared OP-Amp

A third-order DT ΔΣ modulator using noise-shaped bidirectional single-slope quantizer

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A Noise-Coupled Time-Interleaved ¿¿ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR

Cited by 20 publications

References 3 publications

A double-sampled path-coupled single-loop &#x03A3;&#x0394; modulator using noise-shaped integrating quantizer

A double-sampled path-coupled single-loop &#x03A3;&#x0394; modulator using noise-shaped integrating quantizer

Noise-Coupled .DELTA..SIGMA.AD Modulator with Shared OP-Amp

A third-order DT &#x0394;&#x03A3; modulator using noise-shaped bidirectional single-slope quantizer

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A double-sampled path-coupled single-loop ΣΔ modulator using noise-shaped integrating quantizer

A double-sampled path-coupled single-loop ΣΔ modulator using noise-shaped integrating quantizer

A third-order DT ΔΣ modulator using noise-shaped bidirectional single-slope quantizer