2009
DOI: 10.1109/tmtt.2008.2011172
|View full text |Cite
|
Sign up to set email alerts
|

A Nonlinear Electro-Thermal Scalable Model for High-Power RF LDMOS Transistors

Abstract: Abstract-A new nonlinear, charge-conservative, scalable, dynamic electro-thermal compact model for LDMOS RF power transistors is described in this paper. The transistor is characterized using pulsed I-V and S-parameter measurements, to ensure isothermal conditions. A new extrinsic network and extrinsic parameter extraction methodology is developed for high power RF LDMOS transistor modeling, using manifold de-embedding by electromagnetic simulation, and optimization of the extrinsic network parameter values ov… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
2
1

Citation Types

0
13
0

Year Published

2010
2010
2016
2016

Publication Types

Select...
4
4
2

Relationship

1
9

Authors

Journals

citations
Cited by 33 publications
(13 citation statements)
references
References 18 publications
0
13
0
Order By: Relevance
“…Our comprehensive model incorporates a measurementbased nonlinear electrothermal transistor model [19], which was extracted from a 5.0-mm on-wafer transistor. A dense pattern of pulsed I-V and S-parameter measurements are taken over the gate-drain voltage space of the transistor, bounded by the maximum drain current, breakdown voltage, and the maximum allowable power dissipation.…”
Section: A Transistor Model Developmentmentioning
confidence: 99%
“…Our comprehensive model incorporates a measurementbased nonlinear electrothermal transistor model [19], which was extracted from a 5.0-mm on-wafer transistor. A dense pattern of pulsed I-V and S-parameter measurements are taken over the gate-drain voltage space of the transistor, bounded by the maximum drain current, breakdown voltage, and the maximum allowable power dissipation.…”
Section: A Transistor Model Developmentmentioning
confidence: 99%
“…The multi-physics model incorporates a measurement-based nonlinear electrothermal transistor model [5], which was extracted from a 5.0-mm on-wafer transistor. The extrinsic parameters were determined [6], and the intrinsic nonlinear model was then scaled down to the unit gate width of 0.5-mm.…”
Section: Model Developmentmentioning
confidence: 99%
“…A high-level view of the nonlinear model structure. The model can be thought of as a set of 'shells' comprising the gate and drain manifolds, the extrinsic network, the thermal model, and at the kernel, the intrinsic nonlinear model [16]. effects.…”
Section: Mosfet Modeling Approachesmentioning
confidence: 99%