2017 IEEE 4th International Conference on Knowledge-Based Engineering and Innovation (KBEI) 2017
DOI: 10.1109/kbei.2017.8324909
|View full text |Cite
|
Sign up to set email alerts
|

A novel approach for offset canceling in a high-speed four-quadrant MTL multiplier

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Year Published

2019
2019
2022
2022

Publication Types

Select...
5

Relationship

0
5

Authors

Journals

citations
Cited by 5 publications
(1 citation statement)
references
References 6 publications
0
1
0
Order By: Relevance
“…The analysis of the features of solutions [12]- [46], presented in Table I, gives the following conclusions: a) many circuits are not directly suitable for voltage-mode and mixed mode applications because they have insufficiently low impedance of current input terminals [12]- [17], [19]- [24], [27], [28], [32], [35]- [37], [40], [41], [43]- [45], b) voltage input terminals are available in limited number of cases [18], [26], [29]- [31], [33], [34], [38], [39], [42], [46], c) many circuits process only very low-level signals (dynamical limitation) unsuitable for many purposes (especially [13], [17], [23], [38]), in other words only [31] and [46] are acceptable for our purposes but another features are not fulfilled or significant enhancement is required), d) all solutions in Table I have only one single output and, e) the value of output resistance is not known as well as information about its variability when the input levels of the multiplier are changed or DC voltage is connected to selected pair of input terminals in order to operate as operational transconductance amplifier (independence on driving process [47]).…”
Section: Cmos Multipliermentioning
confidence: 99%
“…The analysis of the features of solutions [12]- [46], presented in Table I, gives the following conclusions: a) many circuits are not directly suitable for voltage-mode and mixed mode applications because they have insufficiently low impedance of current input terminals [12]- [17], [19]- [24], [27], [28], [32], [35]- [37], [40], [41], [43]- [45], b) voltage input terminals are available in limited number of cases [18], [26], [29]- [31], [33], [34], [38], [39], [42], [46], c) many circuits process only very low-level signals (dynamical limitation) unsuitable for many purposes (especially [13], [17], [23], [38]), in other words only [31] and [46] are acceptable for our purposes but another features are not fulfilled or significant enhancement is required), d) all solutions in Table I have only one single output and, e) the value of output resistance is not known as well as information about its variability when the input levels of the multiplier are changed or DC voltage is connected to selected pair of input terminals in order to operate as operational transconductance amplifier (independence on driving process [47]).…”
Section: Cmos Multipliermentioning
confidence: 99%