2021
DOI: 10.1109/access.2021.3108443
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A Novel Approximate Adder Design Using Error Reduced Carry Prediction and Constant Truncation

Abstract: This paper proposes a novel approximate adder that exploits an error-reduced carry prediction and constant truncation with error reduction schemes. The proposed adder design techniques significantly improve overall computation accuracy while providing excellent hardware efficiency. Particularly, the proposed carry prediction technique can reduce a prediction error rate by up to 75% compared to existing approximate adders considered in this paper. Furthermore, the error reduction technique also enhances the ove… Show more

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Cited by 32 publications
(8 citation statements)
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References 39 publications
(52 reference statements)
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“…Bit indexing from to da −1 which is opposite to the original work having index n − 1 to 0. Based on [15]. length equals d m +1 bit which is a consequence of the potential multiplication with ±2, according to Equ.…”
Section: Approximate Multiplicationmentioning
confidence: 99%
See 1 more Smart Citation
“…Bit indexing from to da −1 which is opposite to the original work having index n − 1 to 0. Based on [15]. length equals d m +1 bit which is a consequence of the potential multiplication with ±2, according to Equ.…”
Section: Approximate Multiplicationmentioning
confidence: 99%
“…We use a recently published AxC adder denoted the Error Reduced Carry Prediction Approximate Adder (ERC-PAA), [15], shown in Fig. 3.…”
Section: Approximate Additionmentioning
confidence: 99%
“…In this scheme, full adders primarily use SRAM-based sense amplifiers and it is used to smooth images in image processing applications. J. Lee et al, [7] proposed an approximate adder with truncation methods and decreased error distance with improvised mean values. This scheme is used in applications of machine learning, Digital Image Processing (DIP).…”
Section: Background Workmentioning
confidence: 99%
“…A predicted carry calculated in the inaccurate part is fed into the accurate part. Courtesy of [11] (note however that we use bit indexing from 0 to d − 1 which is opposite to the original work where the bits are indexed n − 1 down to 0). fixed-point multiplier with a word-length of 8 bits as suggested in [10].…”
Section: Approximate Addition Used In Sound Zonesmentioning
confidence: 99%
“…Basically, we evaluate the possibilities of employing approximate addition as an alternative to exact addition. We apply a recently published approximate adder design denoted Error Reduced Carry Prediction Approximate Adder (ERCPAA), [11]. It has better or similar performance than a variety of other approximate adders in terms of metrics such as i) carry prediction error rate, ii) mean relative error distance, and iii) normalized mean error distance as compared to power, energy and area-delay product.…”
Section: Introductionmentioning
confidence: 99%