A Novel Common-Ground Multisource Inverter

Singh, Deepak; Sandeep, N.

doi:10.1109/tpel.2023.3316668

Cited by 8 publications

(1 citation statement)

References 17 publications

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“…Regarding the ratio of TC/Gain, the proposed topology has the minimum value when compared with all other topologies. In addition, several topologies that use switched capacitors to achieve voltage boost and more output voltage levels 5L [36] and [37], 7L [38], 9L [39]- [41], and 13L [42] and [43] have been proposed in recent years. However, each of these topologies has its own advantages, including the ability to boost voltage, a reduced number of devices, and a soft charging method to reduce the inrush current, among others.…”

Section: Table IX Comparison With Other Similar Topologiesmentioning

confidence: 99%

A 7L and 11L High Step-Up SCMLI Topology With Reduced Component Voltage Stress

Ali,

Khan,

Pandurangan

et al. 2023

IEEE Access

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This article proposes a new capacitor-based multilevel inverter topology (CBMLI) with fewer devices and reduced voltage stress on capacitors and switches. In addition, the proposed topology can be configured as either a 7-level (7L) or 11L circuit with a maximum voltage gain of 3 and 2.5 times, respectively. Comparisons are made between the proposed topology and existing recent CBMLI topologies, and various power loss analyses are presented. The capacitance values are determined by selecting the maximum discharging period, and the associated analysis is presented. Using the simulation software MATLAB/Simulink, the performance of the proposed circuit topology is validated, and the same is tested in the hardware setup. The various dynamic performance characteristics, such as loading changes, input variations, and modulation index, are validated, and the resulting data is discussed.

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