A novel current-mode ultra low power analog CMOS four quadrant multiplier

Al-Absi, Munir A.; Hussein, A.; Abuelma’atti, Muhammad Taher

doi:10.1109/iccce.2012.6271143

Cited by 10 publications

(6 citation statements)

References 6 publications

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“…Multiplier circuits are very fundamental blocks in signal processing systems. This justifies the growing interest in developing this circuit, proven by many publications in this area; see [23][24][25][26][27]. A multiplier/divider circuit is reported in [23].…”

Section: Multiplier/divider Circuitmentioning

confidence: 90%

High-Bandwidth, Low-Power CMOS Transistor Based CAB for Field Programmable Analog Array

Obadi¹,

Hussein²,

Al‐Bawri³

et al. 2023

Computers, Materials &Amp; Continua

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This article presents an integrated current mode configurable analog block (CAB) system for field-programmable analog array (FPAA). The proposed architecture is based on the complementary metal-oxide semiconductor (CMOS) transistor level design where MOSFET transistors operating in the saturation region are adopted. The proposed CAB architecture is designed to implement six of the widely used current mode operations in analog processing systems: addition, subtraction, integration, multiplication, division, and pass operation. The functionality of the proposed CAB is demonstrated through these six operations, where each operation is chosen based on the user's selection in the CAB interface system. The architecture of the CAB system proposes an optimized way of designing and integrating only three functional cells with the interface circuitry to achieve the six operations. Furthermore, optimized programming and digital tuning circuitry are implemented in the architecture to control and interface with the functional cells. Moreover, these designed programming and tuning circuitries play an essential role in optimizing the performance of the proposed design. Simulation of the proposed CMOS Transistor Based CAB system is carried out using Tanner EDA Tools in 0.35 μm standard CMOS technology. The design uses a ±1.5 V power supply and results in maximum 3 dB bandwidth of 34.9 MHz and an 5886 CMC, 2023, vol.74, no.3 approximate size of 0.0537 mm 2 . This demonstrates the advantages of the design over the current state-of-the-art designs presented for comparison in this article. Consequently, the proposed design has a clear aspect of simplicity, low power consumption, and high bandwidth operation, which makes it a suitable candidate for mobile telecommunications applications.

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Section: Multiplier/divider Circuitmentioning

confidence: 90%

High-Bandwidth, Low-Power CMOS Transistor Based CAB for Field Programmable Analog Array

Obadi¹,

Hussein²,

Al‐Bawri³

et al. 2023

Computers, Materials &Amp; Continua

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“…Due to the current-voltage exponential relation, this implies that the product of CW device currents equals the product of CCW devices. By arbitrarily selecting three currents as inputs and one as output, both multiplication and division operations can be realized [24]. This circuit uses dynamic-threshold-voltage (DVT) transistors with shorted body and gate terminals in order to improve the transient response for a given supply voltage.…”

Section: ∑ F Nlmentioning

confidence: 99%

A Low-Voltage, Low-Power Reconfigurable Current-Mode Softmax Circuit for Analog Neural Networks

et al. 2021

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This paper presents a novel low-power low-voltage analog implementation of the softmax function, with electrically adjustable amplitude and slope parameters. We propose a modular design, which can be scaled by the number of inputs (and of corresponding outputs). It is composed of input current–voltage linear converter stages (1st stages), MOSFETs operating in a subthreshold regime implementing the exponential functions (2nd stages), and analog divider stages (3rd stages). Each stage is only composed of p-type MOSFET transistors. Designed in a 0.18 µm CMOS technology (TSMC), the proposed softmax circuit can be operated at a supply voltage of 500 mV. A ten-input/ten-output realization occupies a chip area of 2570 µm2 and consumes only 3 µW of power, representing a very compact and energy-efficient option compared to the corresponding digital implementations.

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“…The current-mode multipliers are important for our discussion due to similarity of newly proposed concept also using principle of two-quadrant multiplier. Comprehensive comparison [ 28 , 29 , 30 , 31 , 32 , 33 , 34 , 35 , 36 , 37 , 38 , 39 , 40 , 41 , 42 , 43 , 44 , 45 , 46 , 47 , 48 , 49 , 50 , 51 , 52 , 53 , 54 , 55 , 56 , 57 , 58 , 59 , 60 , 61 , 62 , 63 , 64 , 65 , 66 , 67 , 68 ] in Table 2 indicates missing details and incomplete topologies for full implementation in current multiplication or amplification because structures are not designed as fully symmetrical form. They operate with intentional superposition of DC component or principal topology, not including all important parts, in order to obtain behavior required in this work.…”

Section: Introductionmentioning

confidence: 99%

The CMOS Highly Linear Current Amplifier with Current Controlled Gain for Sensor Measurement Applications

Prokop

Šotner

Kledrowetz

2020

Sensors

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This paper introduces a new current-controlled current-amplifier suitable for precise measurement applications. This amplifier was developed with strong emphasis on linearity leading to low total harmonic distortion (THD) of the output signal, and on linearity of the gain control. The presented circuit is characterized by low input and high output impedances. Current consumption is significantly smaller than with conventional quadratic current multipliers and is comparable in order to the maximum processed input current, which is ±200 µA. This circuit is supposed to be used in many sensor applications, as well as a precise current multiplier for general analog current signal processing. The presented amplifier (current multiplier) was designed by an uncommon topology based on linear sub-blocks using MOS transistors working in their linear region. The described circuit was designed and fabricated in a C035 I3T25 0.35-µm ON Semiconductor process because of the demand of the intended application for higher supply voltage. Nevertheless, the topology is suitable also for modern smaller CMOS technologies and lower supply voltages. The performance of the circuit was verified by laboratory measurement with parameters comparable to the Cadence simulation results and presented here.

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A novel current-mode ultra low power analog CMOS four quadrant multiplier

Cited by 10 publications

References 6 publications

High-Bandwidth, Low-Power CMOS Transistor Based CAB for Field Programmable Analog Array

High-Bandwidth, Low-Power CMOS Transistor Based CAB for Field Programmable Analog Array

A Low-Voltage, Low-Power Reconfigurable Current-Mode Softmax Circuit for Analog Neural Networks

The CMOS Highly Linear Current Amplifier with Current Controlled Gain for Sensor Measurement Applications

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