A Novel Fabrication Technique of Ultrathin and Relaxed SiGe Buffer Layers    with High Ge Fraction for Sub-100 nm Strained Silicon-on-Insulator MOSFETs

Tezuka, T.; Sugiyama, N.; Mizuno, Tomohisa; Suzuki, Masatoshi; Takagi, Shinichi

doi:10.1143/jjap.40.2866

Cited by 214 publications

(135 citation statements)

References 22 publications

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“…The SGOI structures are currently fabricated mainly by two methods, layer transfer [28] and Ge condensation [29,30]. In the layer transfer method, hydrogen implantation is employed in order to separate a thin SiGe layer from graded SiGe substrates.…”

Section: Resultsmentioning

confidence: 99%

High-Electron-Mobility SiGe on Sapphire Substrate for Fast Chipsets

Kim

Park

Bae

et al. 2015

Advances in Condensed Matter Physics

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High-quality strain-relaxed SiGe films with a low twin defect density, high electron mobility, and smooth surface are critical for device fabrication to achieve designed performance. The mobilities of SiGe can be a few times higher than those of silicon due to the content of high carrier mobilities of germanium (p-type Si: 430 cm 2 /V⋅s, p-type Ge: 2200 cm 2 /V⋅s, n-type Si: 1300 cm 2 /V⋅s, and n-type Ge: 3000 cm 2 /V⋅s at 10 16 per cm 3 doping density). Therefore, radio frequency devices which are made with rhombohedral SiGe on -plane sapphire can potentially run a few times faster than RF devices on SOS wafers. NASA Langley has successfully grown highly ordered single crystal rhombohedral epitaxy using an atomic alignment of the [111] direction of cubic SiGe on top of the [0001] direction of the sapphire basal plane. Several samples of rhombohedrally grown SiGe on -plane sapphire show high percentage of a single crystalline over 95% to 99.5%. The electron mobilities of the tested samples are between those of single crystals Si and Ge. The measured electron mobility of 95% single crystal SiGe was 1538 cm 2 /V⋅s which is between 350 cm 2 /V⋅s (Si) and 1550 cm 2 /V⋅s (Ge) at 6 × 10 17 /cm 3 doping concentration.

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Section: Resultsmentioning

confidence: 99%

High-Electron-Mobility SiGe on Sapphire Substrate for Fast Chipsets

Kim

Park

Bae

et al. 2015

Advances in Condensed Matter Physics

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“…This result is consistent with a mechanism of the oxidation induced Ge condensation method which is commonly used to form a relaxed SiGe layer for high-performance CMOS. 22) An alternative mechanism for the silica nanowire growth could be the carbothermal reduction 23,24) of GeO 2 . This mechanism is consistent with the result that a carbon implantation is needed for silica nanowire growth from SiGe islands and Ge dots.…”

Section: Discussionmentioning

confidence: 99%

Metal-Catalyst-Free Growth of Silica Nanowires and Carbon Nanotubes Using Ge Nanostructures

Uchino

Hutchison

Ayre

et al. 2011

Jpn. J. Appl. Phys.

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The use of Ge nanostructures is investigated for the metal-catalyst-free growth of silica nanowires and carbon nanotubes (CNTs). Silica nanowires with diameters of 10-50 nm and lengths of ≤ 1 µm were grown from SiGe islands, Ge dots, and Ge nanoparticles. High-resolution transmission electron microscopy (HRTEM) and energy dispersive X-ray spectroscopy (EDS) reveal that the nanowires grow from oxide nanoparticles on the sample surface. We propose that the growth mechanism is thermal diffusion of oxide through the GeO 2 nanostructures. CNTs with diameters 0.6-2.5 nm and lengths of less than a few µm were similarly grown by chemical vapor deposition from different types of Ge nanostructures. Raman measurements show the presence of radial breathing mode peaks and the absence of the disorder induced D-band, indicating single walled CNTs with a low defect density. HRTEM images reveal that the CNTs also grow from oxide nanoparticles, comprising a mixture of GeO 2 and SiO 2

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“…The top Si layer of the sSOI substrate had 0.83% in-plane tensile strain. After the epitaxial growth, the substrate was cleaved into pieces with a size of 1x1 cm 2 , and then oxidized in 100% O 2 atmosphere. The O 2 gas flow was 1 sccm.…”

Section: Fabrication Conditionmentioning

confidence: 99%

Critical Factors for Enhancement of Compressive Strain in SGOI Layers Fabricated by Ge Condensation Technique

et al. 2010

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SGOI layers with high compressive strain and high Ge content are promising channel materials for high current drive pMOSFETs under future technology nodes. In order to clarify the way of maximizing strain in SiGe-On-Insulator (SGOI) structures with high Ge fraction fabricated by th Ge condensation technique, we have examined the strain relaxation behaviors of the SGOI layers during the condensation process. The relationship among compressive strain in SGOI, the oxidation recipe and the substrate structures before oxidation has been quantitatively evaluated. With increasing the Ge fraction, the compressive strain in the SGOI layers linearly increases in lower Ge contents and rapidly decreases after it reaches peak values. It is found that the higher oxidation temperature and the Ge content in the SiGe epitaxial layers before oxidation are influential factors in mitigating the strain relaxation, in addition to the use of the strained Si-OnInsulator (sSOI) substrates As a result of optimizing these structural parameters, we have successfully obtained SGOI with 2.5% compressive strain under the Ge content of 0.86.

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A Novel Fabrication Technique of Ultrathin and Relaxed SiGe Buffer Layers with High Ge Fraction for Sub-100 nm Strained Silicon-on-Insulator MOSFETs

Cited by 214 publications

References 22 publications

High-Electron-Mobility SiGe on Sapphire Substrate for Fast Chipsets

High-Electron-Mobility SiGe on Sapphire Substrate for Fast Chipsets

Metal-Catalyst-Free Growth of Silica Nanowires and Carbon Nanotubes Using Ge Nanostructures

Critical Factors for Enhancement of Compressive Strain in SGOI Layers Fabricated by Ge Condensation Technique

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