2011 3rd Asia Symposium on Quality Electronic Design (ASQED) 2011
DOI: 10.1109/asqed.2011.6111757
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A novel integrated amorphous silicon TFT gate driver circuit with optimized design for TFT-LCD display panel manufacturing

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Cited by 2 publications
(2 citation statements)
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“…Therefore, the larger voltage difference (V gh -V gl ') between the Out_1 and CLK1 cause the shorter fall time of the output. In earlier researches [6,7], the applied clocks were analogous to the clocks introduced in Fig. 3(b) as the conventional signals.…”
Section: A Driving Methodsmentioning
confidence: 99%
See 1 more Smart Citation
“…Therefore, the larger voltage difference (V gh -V gl ') between the Out_1 and CLK1 cause the shorter fall time of the output. In earlier researches [6,7], the applied clocks were analogous to the clocks introduced in Fig. 3(b) as the conventional signals.…”
Section: A Driving Methodsmentioning
confidence: 99%
“…Even the application of the mobile devices, such as the tablet computer, the common resolution is gradually changing to the high definition (HD) or the FHD. Furthermore, the gate driver circuits embedded in display panel becomes worthy and researchable in the FPD design [1][2][3][4][5][6][7][8]. However, a-Si:H thin film transistors are unstable and suffer from an electric field induced threshold voltage shift [9][10][11][12][13].…”
Section: Introductionmentioning
confidence: 99%