A Novel Interconnect Structure for Elmore Delay Model With Resistance-Capacitance-Conductance Scheme

Abstract

In this brief, we present a simple close-form delay estimate, based on first and second order moments that handle arbitrary voltages and conductance effects for a lumped and distributed line. This proposed model introduces a simple tractable delay formula by incorporating conductance (G) into Resistance, Capacitance (RC) network by preserving the characteristics of the Elmore delay model. The RCG model attains quick steady state condition and the accuracy of the interconnect delay estimates can be improved by deploying the conductance effect. The simulation results shows the proposed interconnect scheme performance is better than the existing in terms of delay, power and the figure of merit. The performance analysis depicts that the proposed scheme has improved its figure of merit with minimum and maximum of 21.12% and 49.13%. The analysis is validated through extensive simulations on a 250 nm CMOS technology.

Novel Global Interconnect structure with improved Elmore Delay Estimation for Low-Power Applications

“…2 (a) shows the lumped network of a wire. If step input is applied, 50% point delay for lumped network is equivalent to 0.7RC [7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26]. For long distributed wires, the RC delay can be computed in terms of total wire resistance (R) and total wire capacitance (C).…”

“…When compared with the novel interconnect model as mentioned in [18] with second-order moments, more optimized values were observed for distributed network from the proposed interconnect structure while the delay for lumped circuit was observed to be decreased and power consumption increased. Although, the authors in [18] have simulated their model on different voltages but when compared with the proposed structure, the lumped network power has increased for both the inputs applied but for distributed network power remains the same for pulse input and decreases for ramp input. In [19], authors have evaluated delay at 5ns rising time for different nodes in the RC interconnect circuit.…”

“…The solutions presented have the same accuracy characteristics as compared to the Elmore delay model. In [18], a simple closed-form delay estimation interconnect structure is presented based on first and second-order moments that handle arbitrary voltages and conductance effects for a lumped and distributed line. In [19], authors have proved that the Elmore delay is an absolute upper bound on the 50% delay of an RC tree response.…”

“…This switching can be controlled directly by using encoding methods [1]. Power consumption is one of an important factor considered for a system's performance [18]. It is well learned that by proper wire sizing and improved Elmore delay estimation the propagation delay can be reduced.…”