A Novel Quaternary Full Adder Cell Based on Nanotechnology

Abstract-This article proposes a radiation hardened parallel IO port capable of tolerating radiation induced soft errors including single event upsets (SEUs) as well as single event transients (SETs). To investigate the soft error tolerance capability of the proposed design, we simulated it using the Cadence tool and showed its offered advantages. Comparing with the conventional and well-known TMR IO port, the proposed architecture results in less hardware redundancy and design cost. Through an analytical analysis, we also showed that, our design has lower failure probability than the TMR approach. It also is notable that, among the considered previous counterparts, our proposed design is the only one that is capable of tolerating both the SEUs and SETs.

Section: Simulation Resultsmentioning

confidence: 99%

A Novel Radiation Hardened Parallel IO Port for Highly Reliable Digital IC Design

Rajaei¹,

Rajaei²

2016

“…Full-adders are among the most essential parts in digital circuits; hence, proposing a better design of this element compared to the previous circuits would contribute to the improvement of output parameters of these circuits in a significant manner [14].…”

Section: Transistors Based On Carbon Nanotubesmentioning

confidence: 99%

“…The most essential construction parts in nano devices are Carbon nanotubes (CNT). CNT is a tubular graphite sheet with few nanometers diameter [2,14]. Based on the number of coaxial tubes shaping the nanotubes, they are categorized as single-wall (SWCNT) or multi-wall (MWCNT) each has distinguished properties for different applications.…”

Section: Transistors Based On Carbon Nanotubesmentioning

confidence: 99%

“…In order to have a better performance and lower power consumption in digital computers, researchers have to concentrate on designing full adders with overall better performance. As it is evident, adder is the most important unit in most arithmetic circuits and is recognized as basis of other arithmetic operations [2,6,14,22]. The functionality of some current mode full-adders are reviewed here.…”

Section: Related Workmentioning

confidence: 99%

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Design of an Efficient Current Mode Full-Adder Applying Carbon Nanotube Technology

Nejadzadeh¹,

Reshadinezhad²

2018

In this article a new design of a current mode full-adder is proposed through the field effect transistors based on carbon nanotubes. The outperformance of the current mode full-adder constructed by CNTFET compared to that of constructed by CMOS is observable in the simulation and comparisons. This circuit operates based on triple input majority function. The simulation is run by HSPICE software according to the model proposed in Stanford University for CNTFETs at 0.65 V power supply voltage. The proposed circuit outperforms compared to the previous current mode full-adders in terms of speed, accuracy and PDP.

“…In addition, scaling down the feature size of MOSFET leads to difficulties such as high leakage current, short channel effects, reduced gate control and high power density. To conquer these serious challenges and physical limitations some alternative nanodevices such as carbon nanotube field-effect transistor (CNTFET), nanowire field-effect transistors (NWFET), Graphene nanoribbon field effect transistor (GNRFET), single electron transistor (SET) and quantum cellular automata (QCA) have been introduced and investigated in the literature [3][4][5][6][7].…”

Section: Introductionmentioning

confidence: 99%

An Energy-Efficient and Robust Voltage Level Converter for Nanoelectronics

Alidoosti

Moaiyeri²

2015

Self Cite

Low-power design has recently become very important especially in nanoelectronic VLSI circuits and systems. Functioning of circuits at ultra-low voltages leads to lower power consumption per operation. An efficient method is to separate the logic blocks based on their performance requirement and applying a specific supply voltage for each block. In order to prevent an enormous static current in these multi-VDD circuits, voltage level converters are essential. This study presents an energy-efficient and robust single-supply level converter (SSLC) based on multi-threshold carbon nanotube FETs (CNTFETs). Unique characteristics of the CNTFET device and transistor stacking are utilized suitably to reduce the power and energy consumption of the proposed LC. The results of the extensive simulations, conducted using 32nm CNTFET technology of Stanford University indicate the superiority of the proposed design in terms energy-efficiency and robustness to process, voltage and temperature variations, as compared to the other conventional and state-of-the-art LC circuits, previously presented in the literature. The results demonstrate almost on average 35%, 55%, 90% and 68% improvements in terms of delay, total power, static power and energy consumption, respectively.