A novel self-adaptive Circuit design technique based on evolvable hardware

Abstract

Since traditional fault tolerance methods of electronic systems are based on redundant fault tolerance technique, and their structures are fixed when circuits are designed, the self-adaptive ability is limited. In order to solve these problems, a novel circuit self-adaptive design technique based on evolvable hardware (EHW) is proposed. It features robustness, self-organization and self-adaption. It can be adapted to a complex environment through dynamic configuration of the circuit. In this paper, the proposed technique simulated. The consumption of hardware resources and the number of convergence iterations researched. The effectiveness and superiority of the proposed technique are verified. The designed circuit has the ability of resistible redundant-state interference (RRSI). The proposed technique has a broad application prospect, and it has great significance.

An overview of self-engineering systems

“…FPGAs offer a cheaper solution than having a complete redundant system which can quickly lead to spiralling costs (Frei et al 2013). FPGAs and other evolvable hardware have been extensively researched by previous authors (Zhang et al 2016). Other authors repaired random access memory (RAM) devices with reconfiguration; faulty memory cells are identified using a memory test (monitoring storage and change of data in cells), data in a faulty memory cell is stored at new spare addresses and the system self-reconfigures to adapt to the change (Nair and Bonifus 2018;Shvydun and Adham 2014).…”