A Novel Simple 4-D Hyperchaotic System with a Saddle-Point Index-2 Equilibrium Point and Multistability: Design and FPGA-Based Applications

In this presented study, a 4-D hyper-chaotic system newly proposed to the literature, has been implemented as Multi-Layer Feed-Forward Artificial Neural Network-based on FPGA chip with 32-bit IEEE-754-1985 floating-point number standard to be utilized in real time chaos-based applications. In the first step of the study, 4-D hyper-chaotic system has been numerically modeled on FPGA using Dormand-Prince numeric algorithm. In the second step, the data set (4X10,000) obtained from Matlab-based numeric model has been divided into two parts as training data set (4X8,000) and test data set (4X2,000) to create ANN-based 4-D hyper-chaotic system. A Multi-Layer Feed-Forward ANN structure with 4 inputs and 4 outputs has been constructed for ANN-based 4-D hyper-chaotic system. This structure has only one hidden layer and there are 8 neurons having Tangent Sigmoid activation function used as the activation function in each neuron. 2.58E-07 Mean Square Error (MSE) value has been obtained from the training of ANN-based 4-D hyper-chaotic system. In the third step, after the successful training of ANN-based 4-D hyper-chaotic system, the design of ANN-based 4-D hyper-chaotic system has been carried out on FPGA by taking the bias and weight values of the ANN structure as reference. In this step, at first, Matlab-based Feed-Forward Multi-Layer 4X8X4 network structure has been coded in Very High Speed Integrated Circuit Hardware Description Language (VHDL) to be implemented on FPGA chips. Then, the bias and weight values of the ANN structure has been converted from decimal number system to floating-point number standard and these converted values have been embedded into the network structure. In the last step, the ANN-based 4-D hyper-chaotic system designed on FPGA has been synthesized and tested using Xilinx ISE Design Suite. The chip statistics have been given after the Place&Route process carried out for the Virtex XC6VHX255T-3FF1155 FPGA chip. The maximum operating frequency of ANN-based 4-D hyper-chaotic system on FPGA has been obtained as 240.861 MHZ.

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“…The differential equations of 4-D hyperchaotic system newly presented to the literature are given in Eq. ( 2) [35].…”

Section: -D Hyperchaotic System Phase Portraits and Time Seriesmentioning

confidence: 99%

Artificial Neural Network-Based 4-D Hyper-Chaotic System on Field Programmable Gate Array

Koyuncu

Alçın

Erdoğmuş

et al. 2020

ijisae

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“…Dedieu et al [10] proposed the chaos switching or chaos shift keying, where the binary information signal is used to select the carrier signal between different chaotic generators. Another technique that based on dynamic modulation principle is presented in [11], where in this technique the information signal is used as input to modulate the parameters of a chaotic generator system. The continuously increasing demand for securing the user's personal data push the researchers to develop high order hyperchaotic based cryptosystem, where in [12] 7 dimensional hyperchaotic system is proposed for securing the passive optical network in a corporation with orthogonal frequency division multiplexing (OFDM) technique.…”

Section: Introductionmentioning

confidence: 99%

Four dimensional hyperchaotic communication system based on dynamic feedback synchronization technique for image encryption systems

Alibraheemi

Al-Gayem

Hussein

2022

IJECE

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<span>This paper presents the design and simulation of a hyperchaotic communication system based on four dimensions (4D) Lorenz generator. The synchronization technique that used between the master/transmitter and the slave/receiver is based on dynamic feedback modulation technique (DFM). The mismatch error between the master dynamics and slave dynamics are calculated continuously to maintain the sync process. The information signal (binary image) is masked (encrypted) by the hyperchaotic sample x of Lorenz generator. The design and simulation of the overall system are carried out using MATLAB Simulink software. The simulation results prove that the system is suitable for securing the plain-data, in particular the image data with a size of 128×128 pixels within 0.1 second required for encryption, and decryption in the presence of the channel noise. The decryption results for gray and colored images show that the system can accurately decipher the ciphered image, but with low level distortion in the image pixels due to the channel noise. These results make the proposed cryptosystem suitable for real time secure communications.</span>

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“…Systems that do not have autocorrelation at their output using hardware or software methods and produce numbers that are statistically independent from each other are called Random Number Generators (RNG) (Coskun et al 2019;Gupta et al 2019;Prakash et al 2020). These generators are structures that can generate outputs at the level of randomness, where the next data cannot be predicted with the help of previous data.…”

Section: Introductionmentioning

confidence: 99%

“…For this reason, considerable efforts are being made in the field of developing hardware-based random number generation structures with FPGA and general purpose microprocessors (Koyuncu and Özcerit 2017;Öztürk and Kılıç 2019). FPGA is a programmable integrated circuit (IC) whose internal structure can be changed any number of time with respect to desired function (Koyuncu and Özcerit 2017;Alcin 2020). So, FPGA is used for rapid prototype development.…”

Section: Introductionmentioning

confidence: 99%

FPGA-based Dual Core TRNG Design Using Ring and Runge-Kutta-Butcher based on Chaotic Oscillator

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Tuna

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et al. 2021

Chaos Theory and Applications

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Despite the fact that chaotic systems do not have very complex circuit structures, interest in chaotic systems has increased considerably in recent years due to their interesting dynamic properties. Thanks to the noise-like properties of chaotic oscillators and the ability to mask information signals, great efforts have been made in recent years to develop chaos-based TRNG structures. In this study, a new chaos-based Dual Entropy Core (DEC) TRNG with high operating frequency and high bit generation rate was realized using 3D Pehlivan-Wei Chaotic Oscillator (PWCO) structure designed utilizing RK5-Butcher numerical algorithm on FPGA and ring oscillator structure. In the FPGA-based TRNG model of the system, 32-bit IQ-Math fixed-point number standard is used. The developed model is coded using VHDL. The designed TRNG unit was synthesized for Virtex-7 XC7VX485T-2FFG1761 chip produced by Xilinx. Then, the statistics of the parameters of FPGA chip resource usage and unit clock speed were examined. The data processing time of the TRNG unit was achieved by using the Xilinx ISE Design Tools 14.2 simulation program, with a high bit production rate of 437.043 Mbit/s. In addition, number sequences obtained from FPGA-based TRNG were subjected to the internationally valid statistical NIST 800-22 Test Suite and all the randomness tests of NIST 800-22 Test Suite were successful.

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A Novel Simple 4-D Hyperchaotic System with a Saddle-Point Index-2 Equilibrium Point and Multistability: Design and FPGA-Based Applications

Cited by 34 publications

References 71 publications

Artificial Neural Network-Based 4-D Hyper-Chaotic System on Field Programmable Gate Array

Artificial Neural Network-Based 4-D Hyper-Chaotic System on Field Programmable Gate Array

Four dimensional hyperchaotic communication system based on dynamic feedback synchronization technique for image encryption systems

FPGA-based Dual Core TRNG Design Using Ring and Runge-Kutta-Butcher based on Chaotic Oscillator

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