2017
DOI: 10.1109/led.2017.2679031
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A Novel Tunnel FET Design Through Adaptive Bandgap Engineering With Constant Sub-Threshold Slope Over 5 Decades of Current and High $\text{I}_{\mathrm {ON}}/\text{I}_{\mathrm {OFF}}$ Ratio

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Cited by 44 publications
(20 citation statements)
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“…Due to the lack of experimental data available for InAs/GaAs based TFET, we calibrated the simulation models of our proposed device with the information extracted from a fabrication‐based research work, 27 in order to authenticate the model parameters and the device measurements. We deliberated all the device parameters and biasing conditions of our device exactly the same as that of the published results reported in Zhao et al, 27 for the calibration purpose. Figure 1B illustrates the comparison of the I d V g characteristics obtained from the extracted data of the experimental work 27 and our simulations.…”
Section: Model Validationmentioning
confidence: 99%
“…Due to the lack of experimental data available for InAs/GaAs based TFET, we calibrated the simulation models of our proposed device with the information extracted from a fabrication‐based research work, 27 in order to authenticate the model parameters and the device measurements. We deliberated all the device parameters and biasing conditions of our device exactly the same as that of the published results reported in Zhao et al, 27 for the calibration purpose. Figure 1B illustrates the comparison of the I d V g characteristics obtained from the extracted data of the experimental work 27 and our simulations.…”
Section: Model Validationmentioning
confidence: 99%
“…TFETs have been implemented in a wide range of very different device architectures and material systems [58]- [60]. The most successful demonstrations have been those that can achieve both accurate material control of the III-V heterostructure, and a scaled channel with strong electrostatic control.…”
Section: Iii-v Tunneling Field-effect Transistorsmentioning
confidence: 99%
“…Benchmarking based on Si- and III–V-based state-of-the-art TFET devices with data published by various research groups. We have chosen to use data for SS vs I DS per unit width for both n-TFET (denoted by circle with solid line) and p-TFET (denoted by diamond with solid line) devices which have shown SS near or less than thermal limit (60 mV/dec) at room temperature. ,,, …”
Section: Transition From Mosfets To Energy-efficient Tfet Devicesmentioning
confidence: 99%