A Novel Type-1 Frequency-Locked Loop for Fast Detection of Frequency and Phase With Improved Stability Margins

Kanjiya, Parag; Khadkikar, Vinod; Moursi, Mohamed Shawky El

doi:10.1109/tpel.2015.2435706

Cited by 74 publications

(38 citation statements)

References 27 publications

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“…2) FLL With Inloop CBF: A first-order CBF with the center frequency at the fundamental frequency ω g may also be a good option for the FLL inloop filter. Equation (6) describes such a CBF in the Laplace domain, in which ω p is the CBF cutoff frequency, and Fig. 11(a) illustrates the standard FLL with this CBF as its inloop filter.…”

Section: A Design Examplesmentioning

confidence: 99%

A Study on Three-Phase FLLs

Golestan

Guerrero

Vasquez

et al. 2019

IEEE Trans. Power Electron.

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Contrary to the phase-locked loop (PLL), which has almost reached a mature stage of development in power and energy applications (particularly in three-phase systems), the frequency-locked loop (FLL) is not a mature technique yet. This is probably because of the implementation of FLLs in the stationary reference frame which makes their modeling, tuning, and performance enhancement more complicated than PLLs. The aim of this paper is conducting a research on three-phase FLLs. Providing a review of recent advances, introducing the concept of inloop filter for designing more advanced FLLs, demonstrating the FLL modeling and tuning in the presence of an inloop filter, analyzing the advantages and disadvantages of using an inloop filter in the FLL structure, and establishing a connection between FLLs and PLLs are the main parts of this research.

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Section: A Design Examplesmentioning

confidence: 99%

A Study on Three-Phase FLLs

Golestan

Guerrero

Vasquez

et al. 2019

IEEE Trans. Power Electron.

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“…In Figure 4, the major part is a type-1 PLL. The type-1 PLL has only one integrator in its control loop and, therefore, has a high stability margin and fast dynamics [34][35][36]. of the second Park's transformation will be approximated to Δf ( Δθ while with a constant phase error) due to the effect of the PLL's control loop.…”

Section: The Proposed Fa-psmamentioning

confidence: 99%

A Fixed Length Adaptive Moving Average Filter-Based Synchrophasor Measurement Algorithm for P Class PMUs

2019

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Accurate and fast synchrophasor measurement is the key to the wide applications of PMUs in the system-wide monitoring and reliable operation of smart grid. To address this issue, a fixed length moving average filter-based synchrophasor measurement algorithm for P class phasor measurement units (PMUs) (FA-PSMA) is proposed in this paper. Firstly, a novel fixed length adaptive moving average filter (FAMAF) is proposed. The FAMAF has an adaptive filter capability with a fixed data window length. Then, the FAMAF is applied after a phase-locked loop (PLL) for enhanced disturbance rejection capability under frequency drifts. Finally, a detailed performance assessment is presented to validate the performance of the proposed FA-PSMA. Theoretical analysis and simulation results validate that the proposed FA-PSMA can track the grid frequency and phasor accurately under distorted grid conditions. The response time and measurement accuracy satisfy the requirements specified in IEC/IEEE 60255-118-1.

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“…However, the presence of low-order harmonics introduces ripples into the estimated parameters of both EPLL and OSG-PLLs. According to [19], the standard PLL is a type-2 control system because of the use of the proportional-integral (PI) controller as loop filter. With lower bandwidth design, an enhanced harmonic rejection capability can be achieved, but at the expense of a slower response speed.…”

Section: Introductionmentioning

confidence: 99%

A Novel Open-Loop Frequency Estimation Method for Single-Phase Grid Synchronization Under Distorted Conditions

Fang

Dong

et al. 2017

IEEE J. Emerg. Sel. Topics Power Electron.

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Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.2168-6777 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Abstract-In this paper, a new open-loop architecture with good dynamic performance and strong harmonic rejection capability is proposed for single-phase grid synchronization under distorted conditions. Different from previous single-phase grid synchronization algorithms based on the phase locked loop (PLL) technique, the proposed method is to estimate the frequency and phase angle of the grid voltage in an open-loop manner so that fast dynamic response and enhanced system stability can be achieved. Firstly, an open-loop frequency estimation algorithm is introduced under ideal grid condition. Then, it is extended to distorted grid voltages through the combination of the developed frequency estimation unit and a pre-filtering stage consisting of a second-order lowpass filter and a cascaded delayed signal cancellation (DSC) module. In addition, a transient process smoothing (TPS) unit is designed to achieve smooth frequency transients in cases where the grid voltage experiences fast and large changes. The working principle of the new frequency estimation algorithm and the developed single-phase grid synchronization approach is given in detail, together with some simulation and experiment results for verifying their performance.

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A Novel Type-1 Frequency-Locked Loop for Fast Detection of Frequency and Phase With Improved Stability Margins

Cited by 74 publications

References 27 publications

A Study on Three-Phase FLLs

A Study on Three-Phase FLLs

A Fixed Length Adaptive Moving Average Filter-Based Synchrophasor Measurement Algorithm for P Class PMUs

A Novel Open-Loop Frequency Estimation Method for Single-Phase Grid Synchronization Under Distorted Conditions

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