A novel VLSI architecture of a multi membership function based MAX-MIN calculator circuit

Loan, Sajad A.; Murshid, Asim M.

doi:10.1109/icaes.2013.6659364

Cited by 1 publication

(3 citation statements)

References 10 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Similar to the work presented in [30], the proposal introduced in [31] adopted a semi-parallel implementation, and this way decreased the throughput and increased power consumption. Other Mamdani implementations following the same strategy are also found in [32,33,34,35].…”

Section: Related Workmentioning

confidence: 99%

“…The interest in the development of dedicated hardware implementing Fuzzy Systems has increased due to the demand for high-throughput, low-power and ultra-low-latency control systems for emerging applications in [30], the proposal introduced in [31] adopted a semi-parallel implementation, and this way decreased the throughput and increased power consumption. Other Mamdani implementations following the same strategy are also found in [32,33,34,35].…”

Section: Introductionmentioning

confidence: 99%

“…The development of dedicated hardware, in addition to speeding up parallel processing, makes it possible to operate with clocks adapted to low-power consumption [23,24,25,26,27,28,29]. The works presented in [30,31,32,33,34,35,36,37] propose implementations of FS on reconfigurable hardware (Field Programmable Gate Array -FPGA), showing the possibilities associated with the acceleration of fuzzy inference processes having a high degree of parallelization. Other works propose specific implementations of Fuzzy Control Systems (FCS) using the Fuzzy Mamdani Inference Machine (M-FIM) and the Takagi-Sugeno Fuzzy Inference Machine (TS-FIM) [5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Proposal of Takagi–Sugeno Fuzzy-PI Controller Hardware

Silva

Lopes

Valderrama

et al. 2020

Sensors

View full text Add to dashboard Cite

This work proposes dedicated hardware for an intelligent control system on Field Programmable Gate Array (FPGA). The intelligent system is represented as Takagi-Sugeno Fuzzy-PI controller. The implementation uses a fully parallel strategy associated with a hybrid bit format scheme (fixed-point and other floatingpoint). Two hardware designs are proposed; the first one uses a single clock cycle processing architecture, and the other uses a pipeline scheme. The bit accuracy was tested by simulation with a non linear control system of robotic manipulator. The area, throughput, and dynamic power consumption of the implemented hardware are used to validate and compare the results of this proposal. The results achieved allow that the proposal hardware can use in several applications with high-throughput, low-power and ultra-low-latency restrictions such as teleportation of robot manipulators, tactile internet, industrial automation in industry 4.0, and others. such as the tactile Internet [21,22], the Internet of Things (IoT) and Industry 4.0, where the problems associated with processing, power, latency and miniaturization are fundamental. Robotic manipulators used on tactile internet need a high-throughput and ultra-low-latency control system, and this can be achieved with dedicated hardware [21].The development of dedicated hardware, in addition to speeding up parallel processing, makes it possible to operate with clocks adapted to low-power consumption [23,24,25,26,27,28,29]. The works presented in [30,31,32,33,34,35,36,37] propose implementations of FS on reconfigurable hardware (Field Programmable Gate Array -FPGA), showing the possibilities associated with the acceleration of fuzzy inference processes having a high degree of parallelization. Other works propose specific implementations of Fuzzy Control Systems (FCS) using the Fuzzy Mamdani Inference Machine (M-FIM) and the Takagi-Sugeno Fuzzy Inference propose the Takagi-Sugeno hardware acceleration for other types of application fields. This work aims to develop a new hardware proposal for a Fuzzy-PI controller with TS-FIM. Unlike most of the works presented, this project offers a fully parallel scheme associated with a hybrid platform using fixed-point and floating-point representations. Two TS-FIM hardware modules have been proposed, the first (here called TS-FIM module one-shot) takes one sample time to execute the TS-FIM, and the second (here called as TS-FIM module pipeline) uses registers inside the TS-FIM. Two Fuzzy-PI controller hardware have been proposed, one for the TS-FIM one-shot module and another for the TS-FIM module pipeline. The proposed hardware have been implemented, tested and validated on a Xilinx Virtex 6 FPGA. The synthesis results, in terms of size, resources and throughput, are presented according to the number of bits and the type of numerical precision. Already, the physical area on the target FPGA reaches less than 7%. The implementation achieved a throughput between 10 and 18Msps (Mega samples per second), and between 490and 882 Mfl...

show abstract