A Performance Model to Execute Workflows on High-Bandwidth-Memory Architectures

Abstract

This work presents a realistic performance model to execute scientific workflows on high-bandwidth-memory architectures such as the Intel Knights Landing. We provide a detailed analysis of the execution time on such platforms, taking into account transfers from both fast and slow memory and their overlap with computations. We discuss several scheduling and mapping strategies: not only tasks must be assigned to computing resources, but also one has to decide which fraction of input and output data will reside in fast memory and which will have to stay in slow memory. We use extensive simulations to assess the impact of the mapping strategies on performance. We also conduct experiments for a simple 1D Gauss-Seidel kernel, which assess the accuracy of the model and further demonstrate the importance of a tuned memory management. Our model and results lay the foundations for further studies and experiments on dual-memory systems.

Pattern-Aware Staging for Hybrid Memory Systems

“…In this technique, the data is divided into chunks of a few GB, and the staged access is, in turn, applied to each of them. Several recent studies also focus on the data managements for hybrid memory systems [3,6,11,21,27,36,38], but none of them exploits this large performance impact of the access pattern to improve software-based data placement decisions at runtime.…”

“…Here, to simplify the explanation, we utilize the sequential code. But, our codes are actually parallelized with OpenMP in our evaluation 3. In our evaluation, we parallelize the code as follows: (1) to abort OpenMP parallel for loops on the way, we utilize cancel for statement; (2) to minimize the communications among threads, we set the statistics of the filters as private variables and collect them using atomic statement just after the end of the samplings.…”