A pNML Compact Model Enabling the Exploration of Three-Dimensional Architectures

Turvani, Giovanna; Riente, Fabrizio; Plozner, E.; Vacca, Marco; Graziano, Mariagrazia; Gamm, Stephan Breitkreutz-v.

doi:10.1109/tnano.2017.2657822

Cited by 14 publications

(1 citation statement)

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“…The value of the output element is defined by the superposition of the three surrounding inputs and the sign of the external magnetic field. The external field brings the output close to the coercivity field and then the switching is supported or prevented by the value of the surrounded inputs [27,28]. The global out-of-plane field can be generated on-chip, sandwiching the magnetic stack between cladding material [29].…”

Section: Racetrack Logic: a Case Study 71 Racetrack Backgroundmentioning

confidence: 99%

RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures

et al. 2022

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Most modern CPU architectures are based on the von Neumann principle, where memory and processing units are separate entities. Although processing unit performance has improved over the years, memory capacity has not followed the same trend, creating a performance gap between them. This problem is known as the "memory wall" and severely limits the performance of a microprocessor. One of the most promising solutions is the "logic-in-memory" approach. It consists of merging memory and logic units, enabling data to be processed directly inside the memory itself. Here we propose an RISC-V framework that supports logic-in-memory operations. We substitute data memory with a circuit capable of storing data and of performing in-memory computation. The framework is based on a standard memory interface, so different logic-in-memory architectures can be inserted inside the microprocessor, based both on CMOS and emerging technologies. The main advantage of this framework is the possibility of comparing the performance of different logic-in-memory solutions on code execution. We demonstrate the effectiveness of the framework using a CMOS volatile memory and a memory based on a new emerging technology, racetrack logic. The results demonstrate an improvement in algorithm execution speed and a reduction in energy consumption.

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Section: Racetrack Logic: a Case Study 71 Racetrack Backgroundmentioning

confidence: 99%