A Power-Aware Digital Multilayer Perceptron Accelerator with On-Chip Training Based on Approximate Computing

Kim, Duck-Hwan; Kung, Jaeha; Mukhopadhyay, Saibal

doi:10.1109/tetc.2017.2673548

Cited by 42 publications

(20 citation statements)

References 21 publications

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“…Our HW accelerator can be adopted to train other Multi-Layer Perception (MLP) neural networks that are employed in real-time applications on embedded devices. Some prior works [14], [23], [24] exist in literature to accelerate the training of the MLP or fully-connected neural networks. Approximate computing is adopted in [23] via inexact multipliers and bit-precision reduction to reduce the power consumption.…”

Section: Relu and Dropout Storagementioning

confidence: 99%

“…Some prior works [14], [23], [24] exist in literature to accelerate the training of the MLP or fully-connected neural networks. Approximate computing is adopted in [23] via inexact multipliers and bit-precision reduction to reduce the power consumption. The synapses that have lesser impact on the final error are obtained from the training phase and approximated by the inexact multipliers.…”

Section: Relu and Dropout Storagementioning

confidence: 99%

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An Efficient Hardware Implementation of CNN-Based Object Trackers for Real-Time Applications

El-Shafie¹,

Zaki²,

Habib³

2021

Preprint

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<div>The object tracking research continues to be active since long period because of the several real-world variations imposed in the tracking process, like occlusion, changing appearance, illumination changes and cluttered background. With wide range of applications, embedded implementations are typically pursed for the tracking systems. Although object trackers based on Convolution Neural Network (CNN) have achieved state-of-the-art performance, they challenge the embedded implementations because of slow speed and large memory requirement. In this paper, we address these limitations on the algorithm-side and the circuitside. On the algorithm side, we adopt interpolation schemes which can significantly reduce the processing time and the memory storage requirements. We also evaluate the approximation of the hardware-expensive computations aiming for an efficient hardware implementation. Moreover, we modified the online-training scheme in order to achieve a constant processing time across all video frames. On the circuit side, we developed a hardware accelerator of the online training stage. We avoid the transposed reading from the external memory to speed-up the data movement with no performance degradation. Our proposed hardware accelerator achieves 45.9 frames-per-second in training the fully connected layers.</div>

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Section: Relu and Dropout Storagementioning

confidence: 99%

Section: Relu and Dropout Storagementioning

confidence: 99%

An Efficient Hardware Implementation of CNN-Based Object Trackers for Real-Time Applications

El-Shafie¹,

Zaki²,

Habib³

2021

Preprint

View full text Add to dashboard Cite

show abstract

“…al. [11] to identify the weights that have higher gradient with respect to loss and select them for reduced precision or higher compression. We extend their approach to consider shielding those weights with high gradient from process variations and errors.…”

Section: Comparison With Baselinesmentioning

confidence: 99%

“…As modern DNN models are heavily over parameterized, "protecting" a small fraction of the important parameters can significantly improve robustness against process variation. Such unequal protection of DNN weights have been explored for quantization and compression of weights [11,12]. These methods primarily used heuristics based on gradients as an indicator to determine which weights must be protected.…”

Section: Introductionmentioning

confidence: 99%

Hessian-driven unequal protection of DNN parameters for robust inference

Dash

Mukhopadhyay

2020

Proceedings of the 39th International Conference on Computer-Aided Design

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“…Hence, more efforts should be dedicated on reducing the hardware complexity and power consumption of the DSP system to deal with embedding constraints. This goal can be pursued by using specific design methods such as approximate computing techniques [36,37,38]. Exploiting inexact arithmetic circuits for SVD implementation would improve the system efficiency by decreasing the power consumption and hardware resources.…”

Section: Classification Study Based On Fpga Implementationmentioning

confidence: 99%

Real-Time Digital Signal Processing Based on FPGAs for Electronic Skin Implementation †

Ibrahim

Gastaldo

Chiblé

et al. 2017

Sensors

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Enabling touch-sensing capability would help appliances understand interaction behaviors with their surroundings. Many recent studies are focusing on the development of electronic skin because of its necessity in various application domains, namely autonomous artificial intelligence (e.g., robots), biomedical instrumentation, and replacement prosthetic devices. An essential task of the electronic skin system is to locally process the tactile data and send structured information either to mimic human skin or to respond to the application demands. The electronic skin must be fabricated together with an embedded electronic system which has the role of acquiring the tactile data, processing, and extracting structured information. On the other hand, processing tactile data requires efficient methods to extract meaningful information from raw sensor data. Machine learning represents an effective method for data analysis in many domains: it has recently demonstrated its effectiveness in processing tactile sensor data. In this framework, this paper presents the implementation of digital signal processing based on FPGAs for tactile data processing. It provides the implementation of a tensorial kernel function for a machine learning approach. Implementation results are assessed by highlighting the FPGA resource utilization and power consumption. Results demonstrate the feasibility of the proposed implementation when real-time classification of input touch modalities are targeted.

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A Power-Aware Digital Multilayer Perceptron Accelerator with On-Chip Training Based on Approximate Computing

Cited by 42 publications

References 21 publications

An Efficient Hardware Implementation of CNN-Based Object Trackers for Real-Time Applications

An Efficient Hardware Implementation of CNN-Based Object Trackers for Real-Time Applications

Hessian-driven unequal protection of DNN parameters for robust inference

Real-Time Digital Signal Processing Based on FPGAs for Electronic Skin Implementation †

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