A Practical On-Board SiC MOSFET Condition Monitoring Technique for Aging Detection

Pu, Shi; Yang, Fei; Vankayalapati, Bhanu Teja; Uğur, Enes; Xu, Chi; Akin, Bilal

doi:10.1109/tia.2020.2980220

Cited by 43 publications

(11 citation statements)

References 26 publications

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“…

\begin{equation}{Z} = {v_{mp}}/{i_{mp}} \end{equation}

where v mp and i mp are the maximum value of the v m and i m . In addition, the on‐state resistance increases with the lift‐off of the bond wire [19], so the loop impedance magnitude is sensitive to the bond wire lift‐off.…”

Section: Mechanism Of the Monitoring Methodsmentioning

confidence: 99%

Non‐contact and anti‐interference diagnosis of SiC MOSFET module bond wire faults for EV wireless charging device

Wang

et al. 2023

IET Power Electronics

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SiC MOSFET modules are widely used for bidirectional wireless charging of electric vehicles. However, prolonged use can result in bond wire faults, leading to reliability issues. To address this problem, a non‐contact bond wire monitoring method that can be carried out using the charging coil of the wireless charging device is proposed. Here, two monitoring loops are constructed based on the circuit topology, and their impedance magnitudes are measured on the charging coil to avoid the influence of battery voltage on monitoring results. To detect the bond wire condition, the impedance magnitude difference of the two monitoring loops is chosen as an indicator, which is very sensitive to the bond wire lift‐off. However, the monitoring results may be influenced by the aging of resonant capacitors and the offset of the charging coil. In particular, the influence of the coil offset is significant. To mitigate this effect, a prognostic parameter calibration method is proposed. Experimental results confirm the effectiveness of the proposed method, which provides a promising solution for the reliable and safe operation of SiC MOSFET modules in wireless charging devices.

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“…

\begin{equation}{Z} = {v_{mp}}/{i_{mp}} \end{equation}

Section: Mechanism Of the Monitoring Methodsmentioning

confidence: 99%

Non‐contact and anti‐interference diagnosis of SiC MOSFET module bond wire faults for EV wireless charging device

Wang

et al. 2023

IET Power Electronics

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“…The kelvin-source impedance is presented for package degradation monitoring which is only applicable for 4pin devices with the Kelvin connection [74]. The device's thermal impedance [75], saturation current [76], and miller capacitance [77] are other parameters for aging monitoring. These precursors can hardly be used for online tracking.…”

Section: Precursor Selection For Condition Monitoringmentioning

confidence: 99%

AC Power Cycling Test Setup and Condition Monitoring Tools for SiC-Based Traction Inverters

Farhadi

Vankayalapati

Sajadi

et al. 2023

IEEE Trans. Veh. Technol.

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AC power cycling tests allow the most realistic reliability assessment by applying close to real stress to the device or module under test to meet functional safety standards, which is highly critical for traction applications. This paper presents a comprehensive guideline and shares critical know-how to develop a 120 KVA AC power cycling test setup for high-power Silicon Carbide (SiC) modules. As of today, traction applications can not generate an early warning signal for drivers to replace critical components on time. For this purpose, the suitable precursors for all dominant failure mechanisms are discussed, and the corresponding condition monitoring tools are proposed to monitor the device aging on power converters. These condition monitoring tools are integrated into the built-in desaturation protection circuit of the electric vehicle (EV) gate driver for low-cost, practical implementation. The on-resistance of all twelve switches is monitored online as a temperature-sensitive electrical parameter (TSEP) to measure the junction temperature of the devices. To avoid heavy processing load in the microcontroller, the out-of-order equivalent time sampling technique is developed for data sampling, which leads to a measurement error of less than 1.5%. In addition, the design considerations regarding common mode noise and aging effect on DESAT protection are investigated, and experimental findings are presented.

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“…If the strain exceeds the elastic region of the stress deformation characteristic, then cracks, voids, and material dislocations are produced in the die attach because of the great difference in the linear CTE of the materials (CTE for copper is 16-18, silicon is 2.6-3.3, and lead-free solder is 20-22.9 ppm/ °C). From the existing literature study, R DS(on) is the most significant aging factor in MOSFETs [4,11], [25][26][27][28][29][30][31][32][33]. Temperature elevation accelerates the degradation processes of semiconductor devices, and the Arrhenius equation can describe the influence of temperature.…”

Section: Parasitic Parameters As Quality Precursors 221 Mosfet Qualit...mentioning

confidence: 99%

Failure quantitative assessment approach to MOSFET power device by detecting parasitic parameters

Yun

Yang

et al. 2022

Front. Phys.

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With the emerging wide bandgap (WBG) semiconductor development, the increasing power density and efficiency of power electronic converters may cause more switching oscillation, electromagnetic interference noise, and additional power loss, further increasing the probability of device failure. Therefore, determining and quantifying the failure of a metal-oxide-semiconductor-field-effect transistor (MOSFET), which assembled using WBG semiconductor in some applications, is crucial to improving the reliability of a power converter. This study proposes a novel failure quantitative assessment approach based on MOSFET parasitic parameters. According to the two-port network theory, MOSFET is equivalent to some second-order RLC circuits composed of independent inductances, capacitances, and resistances in series. Then, the frequency-domain impedance associated with the physical failure of MOSFET is identified through frequency domain reflectometry. Accelerated aging and bond wires cut-off experiments are employed to obtain various quality states of the MOSFET device. Result shows that the MOSFET quality level and its number of bond wire lift-offs can be quantified effectively. Drain-to-source on-resistance (RDS(on)) that normally represents the MOSFET quality shows a positive linear function relationship on drain-to-source parasitic resistance (RD + RS) during the quality degradation proceeding. This finding matches with the correlation established between RDS (on) and RD + RS in theory. Meanwhile, source parasitic inductance (LS) increases with the severity of bond wires faults, and even the slight fault shows a high sensitivity. The proposed approach would be an effective quality screening technology for power semiconductor devices without power on treatment, which can effectively avoid the impact of junction temperature and test conditions (current and voltage) on test results, and does not need to design additional test circuits. The test frequency range we used in this approach was 10–300 MHz, which to some extent is suitable for providing an on-line quality monitoring technology for high-frequency WBG power devices manufacturing.

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A Practical On-Board SiC MOSFET Condition Monitoring Technique for Aging Detection

Cited by 43 publications

References 26 publications

Non‐contact and anti‐interference diagnosis of SiC MOSFET module bond wire faults for EV wireless charging device

Non‐contact and anti‐interference diagnosis of SiC MOSFET module bond wire faults for EV wireless charging device

AC Power Cycling Test Setup and Condition Monitoring Tools for SiC-Based Traction Inverters

Failure quantitative assessment approach to MOSFET power device by detecting parasitic parameters

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