A Programmable Majority Logic Array Using Molecular Scale Electronics

Rose, Garrett S.; Stan, Mircea R.

doi:10.1109/tcsi.2007.907860

Cited by 26 publications

(14 citation statements)

References 30 publications

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“…However, the proposed FPGA architecture might have several distinct advantages: First, it is a technology aspect. Various FPGA concepts [18][19][20][21][22] based on complex functionality of crosspoint devices, e.g., on negative differential resistance, programmable nanowire field effect transistors, and/or relying on several types of complex nanoscale devices, such as in schemes with stochastic nano/micro interfaces might be too immature for near term introduction of such circuits. Similar argument applies to FPGAs based on carbon nanotubes [23][24][25][26].…”

Section: Results Inmentioning

confidence: 99%

Monolithically stackable hybrid FPGA

Strukov¹,

Mishchenko²

2010

2010 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE 2010)

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-The paper introduces novel field programmable gate array (FPGA) circuits based on hybrid CMOS/resistive switching device (memristor) technology and explores several logic architectures. The novel FPGA structure is based on the combination of CMOL (Cmos + MOLecular scale devices) FPGA circuits and recent improvements and generalization of the CMOL concept to allow multilayer crossbar integration, compatibility with state-of-the-art foundries, and a wide range of available memristive crosspoint devices. Preliminary results indicate that with no optimization and only conventional CMOS technology, the proposed circuits can be at least ten times denser (and potentially faster) than CMOS FPGAs with the same design rules and similar power density. The second part of this paper shows that this performance can be further improved using optimal MUX-based logic architecture.

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Section: Results Inmentioning

confidence: 99%

Monolithically stackable hybrid FPGA

Strukov¹,

Mishchenko²

2010

2010 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE 2010)

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“…Although hysteresis curves have different shapes, many molecular switching devices have an I-V characteristic such as that presented in Figure 4 (Rose and Stan, 2007). This curve illustrates that, in general, molecular electronic I/V curves have hysteresis in the first and third quadrant.…”

Section: The Hysteresis Phenomenonmentioning

confidence: 91%

“…This model is characterized in more detail in Stan et al (2003), and Rose et al (2004Rose et al ( , 2007. The UDM concept uses empirical equations that describe each fundamental quantum and classical effect that may be relevant to an electronic device .…”

Section: A Brief Survey Of Molecular Electronics Modelsmentioning

confidence: 99%

A Novel SPICE compatible behavioral model for molecular electronics having hysteresis effects

Bahrepour¹,

Sharifi²

2014

Sci. Res. Essays

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Although molecular electronics is in its infancy, there are many significant advances in understanding and implementing computational functions based on molecular electronic devices. In order to evaluate a molecular electronic circuit, a model is needed. In existing literature, only a few models have been introduced for molecular electronics, all of which do not support the hysteresis phenomenon. To the best of the authors' knowledge, for the first time, this paper introduces a behavioral model in SPICE which is able to imitate hysteresis behavior in a desired molecular circuit. The proposed model is then modified in order to guarantee continuous behavior in its I/V curves. Some molecular electronic I/V curves from the literature are selected and by utilizing the proposed model, its correct operation are investigated.

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“…Several approaches for memristor-based logic have been proposed, e.g., [6] and [7], which suggest using memristors as configurable switches as in an FPGA. The logic gates are designed as CMOS gates or as programmable majority logic array (PMLA) based on Goto pairs as logic gates [8].…”

Section: Introductionmentioning

confidence: 99%

Memristor-based IMPLY logic design procedure

Kvatinsky

Kolodny

Weiser

et al. 2011

2011 IEEE 29th International Conference on Computer Design (ICCD)

117

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-Memristors can be used as logic gates. No design methodology exists, however, for memristor-based combinatorial logic. In this paper, the design and behavior of a memristivebased logic gate -an IMPLY gate -are presented and design issues such as the tradeoff between speed (fast write times) and correct logic behavior are described, as part of an overall design methodology. A memristor model is described for determining the write time and state drift. It is shown that the widely used memristor model -a linear ion drift memristor -is impractical for characterizing an IMPLY logic gate, and a different memristor model is necessary such as a memristor with a current threshold.

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A Programmable Majority Logic Array Using Molecular Scale Electronics

Cited by 26 publications

References 30 publications

Monolithically stackable hybrid FPGA

Monolithically stackable hybrid FPGA

A Novel SPICE compatible behavioral model for molecular electronics having hysteresis effects

Memristor-based IMPLY logic design procedure

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