2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221)
DOI: 10.1109/icassp.2001.941070
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A programmable processor with 4096 processing units for media applications

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Cited by 7 publications
(1 citation statement)
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“…The proposed parallel processor was developed with verilog HDL and verified with a FPGA prototype system. [10], [11], [12], [13], [14] …”
mentioning
confidence: 99%
“…The proposed parallel processor was developed with verilog HDL and verified with a FPGA prototype system. [10], [11], [12], [13], [14] …”
mentioning
confidence: 99%