A quad-slope ADC multiplier

Abstract

The paper deals with the design and construction of a four-quadrant hybrid multiplier using the quad-slope technique. The quad-slope multiplier is a multiplying analogue. to.digital converter based on the dual-slope integrating converter. The ratio of the product of two unknown voltages to the square of a reference voltage is obtained in terms of the ratio of a measured time interval to a known time interval. In this technique both the multiplication as well as the conversion are obtained at the sB.me cost as for the conversion alone. An analogue output product is obtainable. Linear and digital ICe have been used in this circuit. Use of the circuit as a divider is also explained.

New sampled-data analogue multiplier

“…Techniques based in pulse modulation give slow response but provide high accuracy (Wong and Ott 1976). Among such methods described in the literature are: the pulse-width amplitude modulation (PWAM) method (Bhat 1980, Rathore 1983, Rathore and Bhattacharyya 1984, the sampled-data method (Brodarac et al 1982), the quad-slope analogue-to-digital conversion (ADC) method (Taha and Abdul-Karim 1983), the triangular-wave method (Velayudhan and Bundell 1984), the pulse-interval amplitude modulation (PIAM) method (Fyath and Abdullah 1985a), and the compound pulse-time modulation (PTM) method (Fyath and Abdullah 1985 b).…”