1990
DOI: 10.1109/31.52725
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A ratio-independent algorithmic analog-to-digital converter combining current mode and dynamic techniques

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Cited by 72 publications
(34 citation statements)
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“…Reducing random errors implies using larger transistor sizes. Reducing systematic errors implies using more elaborate current mirror topologies that either reduce their output conductance (using cascode [15], regulated cascode [16], or gain-boosting [17] techniques), decrease their input impedance [18], or both [19]. The application we had in mind when we developed this circuit was a WTA for a multichip real time clustering system [11].…”
Section: Resultsmentioning
confidence: 99%
“…Reducing random errors implies using larger transistor sizes. Reducing systematic errors implies using more elaborate current mirror topologies that either reduce their output conductance (using cascode [15], regulated cascode [16], or gain-boosting [17] techniques), decrease their input impedance [18], or both [19]. The application we had in mind when we developed this circuit was a WTA for a multichip real time clustering system [11].…”
Section: Resultsmentioning
confidence: 99%
“…3 [22]. It is obtained by simply cascading elementary 1-bit cells, and by properly terminating the last one with transistors MTa-MTb.…”
Section: B Current-mode Implementationmentioning
confidence: 99%
“…We used a simple 3-transistor current mirror for the 2-output NMOS current mirror of each cell. However, we used active input current mirrors [5] for the N-output PMOS current mirror and for the extra NMOS assembling current mirrors [l], [2].…”
Section: Resultsmentioning
confidence: 99%