A Regulated Charge Pump for Tunneling Floating-Gate Transistors

Rumberg, Brandon; Graham, David; Navidi, Mir Mohammad

doi:10.1109/tcsi.2016.2613080

Cited by 34 publications

(34 citation statements)

References 29 publications

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“…The comparator architecture in the MSP (depicted in Figure 6) consists of a differential amplifier cascaded with an inverter and an "edgifier" circuit. The edgifier circuit was proposed in [35] and uses starved inverters to accelerate the rising and falling edges of its input signal, making it useful for the digitization of slow analog signals.…”

Section: Digitizationmentioning

confidence: 99%

An Acoustic Vehicle Detector and Classifier Using a Reconfigurable Analog/Mixed-Signal Platform

Bhattacharyya

Andryzcik

Graham

2020

JLPEA

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The wireless sensor nodes used in a growing number of remote sensing applications are deployed in inaccessible locations or are subjected to severe energy constraints. Audio-based sensing offers flexibility in node placement and is popular in low-power schemes. Thus, in this paper, a node architecture with low power consumption and in-the-field reconfigurability is evaluated in the context of an acoustic vehicle detection and classification (hereafter “AVDC”) scenario. The proposed architecture utilizes an always-on field-programmable analog array (FPAA) as a low-power event detector to selectively wake a microcontroller unit (MCU) when a significant event is detected. When awoken, the MCU verifies the vehicle class asserted by the FPAA and transmits the relevant information. The AVDC system is trained by solving a classification problem using a lexicographic, nonlinear programming algorithm. On a testing dataset comprising of data from ten cars, ten trucks, and 40 s of wind noise, the AVDC system has a detection accuracy of 100%, a classification accuracy of 95%, and no false alarms. The mean power draw of the FPAA is 43 μ W and the mean power consumption of the MCU and radio during its validation and wireless transmission process is 40.9 mW. Overall, this paper demonstrates that the utilization of an FPAA-based signal preprocessor can greatly improve the flexibility and power consumption of wireless sensor nodes.

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Section: Digitizationmentioning

confidence: 99%

An Acoustic Vehicle Detector and Classifier Using a Reconfigurable Analog/Mixed-Signal Platform

Bhattacharyya

Andryzcik

Graham

2020

JLPEA

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“…Some other aspects of a good charge pump are fast start-up time and small die area. In this work, we used an LDO inside the loop of [3] to make the ripple smaller. We did not place the LDO outside the charge pump loop because that resulted in larger ripple and longer settling time.…”

Section: Considerations Regarding Injection Voltages and Scalingmentioning

confidence: 99%

“…6.8. This charge pump is based on [3] which uses a variablefrequency regulation technique to provide a low-ripple output voltage. Our charge pump uses 4 charge transfer switch stages as shown in Fig.…”

Section: Negative Charge Pumpmentioning

confidence: 99%

“…Block diagram of tunneling charge pump we presented in[3].output voltage to provide voltages for injection. We present a method to reduce output ripple in high-voltage charge pumps by adding a high power-supply-rejection-ratio (PSRR) low drop-out regulator (LDO) in the regulation loop of the charge pump.…”

mentioning

confidence: 99%

“…14(a) shows the circuit diagram of the proposed high-voltage charge pump. The charge pump presented in[3] has a small ripple (around 20mV) which is adjustable with the load capacitor.…”

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confidence: 99%

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Integrated Circuits for Programming Flash Memories in Portable Applications

Navidi¹

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Smart devices such as smart grids, smart home devices, etc. are infrastructure systems that connect the world around us more than before. These devices can communicate with each other and help us manage our environment. This concept is called the Internet of Things (IoT). Not many smart nodes exist that are both low-power and programmable. Floating-gate (FG) transistors could be used to create adaptive sensor nodes by providing programmable bias currents. FG transistors are mostly used in digital applications like Flash memories. However, FG transistors can be used in analog applications, too. Unfortunately, due to the expensive infrastructure required for programming these transistors, they have not been economical to be used in portable applications. In this work, we present low-power approaches to programming FG transistors which make them a good candidate to be employed in future wireless sensor nodes and portable systems. First, we focus on the design of low-power circuits which can be used in programming the FG transistors such as highvoltage charge pumps, low-drop-out regulators, and voltage reference cells. Then, to achieve the goal of reducing the power consumption in programmable sensor nodes and reducing the programming infrastructure, we present a method to program FG transistors using negative voltages. We also present charge-pump structures to generate the necessary negative voltages for programming in this new configuration.

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