Integrated Circuits for Programming Flash Memories in Portable Applications

Abstract

Smart devices such as smart grids, smart home devices, etc. are infrastructure systems that connect the world around us more than before. These devices can communicate with each other and help us manage our environment. This concept is called the Internet of Things (IoT). Not many smart nodes exist that are both low-power and programmable. Floating-gate (FG) transistors could be used to create adaptive sensor nodes by providing programmable bias currents. FG transistors are mostly used in digital applications like Flash memories. However, FG transistors can be used in analog applications, too. Unfortunately, due to the expensive infrastructure required for programming these transistors, they have not been economical to be used in portable applications. In this work, we present low-power approaches to programming FG transistors which make them a good candidate to be employed in future wireless sensor nodes and portable systems. First, we focus on the design of low-power circuits which can be used in programming the FG transistors such as highvoltage charge pumps, low-drop-out regulators, and voltage reference cells. Then, to achieve the goal of reducing the power consumption in programmable sensor nodes and reducing the programming infrastructure, we present a method to program FG transistors using negative voltages. We also present charge-pump structures to generate the necessary negative voltages for programming in this new configuration.

Low Power Voltage Reference Cells for Sensing Applications

“…A 5-step design procedure can acquire a low TC while producing above-1V voltage output using the circuit of Figure 2.1. This is based off of Navidi's procedure for his circuit as detailed in [11], and by simulating the circuit with different size ratios, it was found that these steps would be appropriate for this circuit.…”

“…Reference Cell with above 1V The only difference in this new circuit is the reference cell. Due to this, most of the equations applicable to Navidi's original circuit can be applied to this new circuit as well as principles of operation as described in [11].…”

“…The purpose of this paper involves two cells designed in the 0.5 µm process. The first circuit is an improvement of the reference cell designed by Mir Muhammad Navidi that obtained a Temperature Coefficient of 42 ppm/ • C and 1.11 µW as covered in [11]. The improved circuit will be covered in Chapter 2.…”

Low-Power Reconfigurable Sensing Circuitry for the Internet-of-Things Paradigm

“…Above 250nm, the ratio is relatively constant. 250nm and below, the ratio increases because V dd continues to scale as V tun stays relatively constant [1].…”

“…Above 250nm, the ratio is relatively constant. 250nm and below, the ratio increases because V dd continues to scale as V tun stays relatively constant [1] Bottom plot shows the ratio of V inj to V dd . In practice, the supply V dd should be kept lower than standard V dd to prevent unwanted HEI.…”