A Resultant Stress Effect of Contact Etching Stop Layer and Geometrical Designs of Poly Gate on Nanoscaled nMOSFETs with a Si<SUB>1−x</SUB>Ge<SUB>x</SUB> Channel

Abstract

In this research, an n-type metal-oxide-semiconductor field effect transistor (nMOSFET) device with a SiGe channel exerted by the combination of a contact etching stop layer (CESL) and silicon germanium (Si1-xGe(x)) channel stressors is proposed. To explore the foregoing mechanical effect on the stress distribution of nMOSFETs within the channel region, a process-oriented simulated technique is adopted for the concerned nMOSFET device. The loading sources are a 1.1 GPa tensile CESL (t-CESL) and a SiGe channel structure constructed with 0%, 22.5%, and 25%, germanium (Ge) mole fractions. The results of the simulation show that the stress components of the Si1-xGe(x) channel evidently increase when the Ge mole fraction within a Si1-xGe(x) layer is increased. A pulling force exerted on the protruding gate structure by the CESL layer that causes dominant bending deformation and channel stress variation behaviors is a major reason for this phenomenon. Therefore, the degree of bending effect caused by the protruding gate structure is concluded as being the key to determining the trends and stress magnitudes of the Si1-xGe(x) device channel.

State of the Art and Future Perspectives in Advanced CMOS Technology

“…Recently, more and more articles pay attention on nanoscale Ge or GeSi MOSFET. Both the experimental and simulation work presented the stress-induced mobility gain of CESL as strongly dependent on the layout arrangement of devices, particularly in situations with narrow widths [ 186 ]. P. Nguyen et al has demonstrated induced CESL in Ω-gate CMOS nanowires with p-FETs and n-FETs down to W = 15~20nm gate length [ 187 , 188 ].…”