A review of real-time soft-error rate measurements in electronic circuits

Autran, Jean‐Luc; Munteanu, Daniéla; Serre, S.; Sauze, S.

doi:10.1109/irps.2012.6241843

Cited by 9 publications

(10 citation statements)

References 15 publications

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“…From the detection and counting of single events upsets occurring during the experiment, one can estimate the soft error rate (SER) of the devices under test. In case of SRAM circuits, the result can be given in terms of "event" SER, "total bit flip" SER, "multiple cell upset" (MCU) SER, and can be numerically expressed in FIT/Mbit (one FIT equals one failure per 10 9 hours of operation) [6][7].…”

Section: Introductionmentioning

confidence: 99%

Multi-Poisson process analysis of real-time soft-error rate measurements in bulk 65 nm and 40 nm SRAMs

Moindjie

Autran

Munteanu

et al. 2017

Microelectronics Reliability

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Altitude and underground real-time soft error rate (SER) measurements on SRAM circuits have been analyzed in terms of independent multi-Poisson processes describing the occurrence of single events as a function of bit flip multiplicity. Applied for both neutron-induced and alpha particle-induced SERs, this detailed analysis highlights the respective contributions of atmospheric radiation and alpha contamination to multiple cell upset mechanisms. It also offers a simple way to predict by simulation the radiation response of a given technology for any terrestrial position, as illustrated here for bulk 65nm and 40nm SRAMs.

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Section: Introductionmentioning

confidence: 99%

Multi-Poisson process analysis of real-time soft-error rate measurements in bulk 65 nm and 40 nm SRAMs

Moindjie

Autran

Munteanu

et al. 2017

Microelectronics Reliability

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“…Real-time or life SER testing is a complicated and expensive technique performed at nominal circuit use conditions, requiring several hundreds or even thousands of devices to be tested to get a statistically significant result [1] [2]. Moreover, the duration of a typical experiment runs from several months to even one or various years [1]- [4].…”

Section: Introductionmentioning

confidence: 99%

“…Moreover, the duration of a typical experiment runs from several months to even one or various years [1]- [4]. One alternative to this approach is accelerated testing where intense radiation sources, with a particle flux that is generally more than 10 6 × as large as the flux under nominal conditions, is applied [1] [2]. Accelerated SER testing requires only few samples to be processed and therefore tests can be completed within a short time of days or even hours [1] [2].…”

Section: Introductionmentioning

confidence: 99%

“…One alternative to this approach is accelerated testing where intense radiation sources, with a particle flux that is generally more than 10 6 × as large as the flux under nominal conditions, is applied [1] [2]. Accelerated SER testing requires only few samples to be processed and therefore tests can be completed within a short time of days or even hours [1] [2]. The obtained data is then extrapolated to normal conditions, and different experiments for each radiation type are required.…”

Section: Introductionmentioning

confidence: 99%

“…This technique requires either having or contracting a radiation facility with various radiation source types and/or accelerators representing in general an expensive alternative. It has been also pointed that accelerated test results can be potentially fouled by the setup or experimental conditions according to the facility like beam uniformity/fluctuations or by differences between the source distribution and the natural environment spectrum among other effects [2].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Alpha-SER determination from word-line voltage margin (WVM) measurements: Design architecture and experimental results

Torrens

Paul

Alorda

et al. 2013

2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS)

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Experimental results from a 65nm CMOS commercial technology SRAM test chip reveal a high correlation between the word-line voltage margin (WVM) -defined as the difference between the memory nominal supply voltage and the lower mean voltage applied to the word-line capable of writing a cell -and the measured circuit alpha-SER. Additional experiments show that no other memory cell robustness-related parameters (like the minimum supply voltage during hold or read) exhibit such correlation. After an initial irradiation experiment on a reduced sample circuits, the WVM technique can be used to estimate the alpha-SER levels on each particular circuit without requiring additional irradiation experiments. The technique requires a specific memory design modification that does not degrade circuit performance while circuit area increase is negligible. Proc. RADECS 2013 J-1 1/4 978-1-4673-5057-0/13/$31.00 ©2013 IEEE Proc. RADECS 2013 J-1 3/4

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Real-time soft error testing system for large-area QDR II+ SRAM array on the Tibetan Plateau

Teng

Zhang

Wei

et al. 2019

Microelectronics Reliability

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A review of real-time soft-error rate measurements in electronic circuits

Cited by 9 publications

References 15 publications

Multi-Poisson process analysis of real-time soft-error rate measurements in bulk 65 nm and 40 nm SRAMs

Multi-Poisson process analysis of real-time soft-error rate measurements in bulk 65 nm and 40 nm SRAMs

Alpha-SER determination from word-line voltage margin (WVM) measurements: Design architecture and experimental results

Real-time soft error testing system for large-area QDR II+ SRAM array on the Tibetan Plateau

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