A review of world's fastest connected component labeling algorithms: Speed and energy estimation

Cabaret, Laurent; Lacassagne, Lionel; Oudni, Louiza

doi:10.1109/dasip.2014.7115641

Cited by 15 publications

(8 citation statements)

References 12 publications

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“…It has been shown in [3] that, for a single-threaded benchmark and for six generations of Intel processors (Conroe, Penryn, Nehalem, Sandy-Bridge, Ivy-Bridge and Haswell), the performance in cpp of the eight algorithms are very stable. The key processor was the Nehalem which introduces a new memory bus between the external memory and the cache hierarchy.…”

Section: Benchmark Metricsmentioning

confidence: 99%

Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors

Cabaret

Lacassagne

Etiemble

2016

J Real-Time Image Proc

Self Cite

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International audienceIn the last decade, many papers have been published to present sequential connected component labeling (CCL) algorithms. As modern processors are multi-core and tend to many cores, designing a CCL algorithm should address parallelism and multithreading. After a review of sequential CCL algorithms and a study of their variations, this paper presents the parallel version of the Light Speed Labeling for Connected Component Analysis (CCA) and compares it to our parallelized implementations of State-of-the-Art sequential algorithms. We provide some benchmarks that help to figure out the intrinsic differences between these parallel algorithms. We show that thanks to its run-based processing, the LSL is intrinsically more efficient and faster than all pixel-based algorithms. We show also, that all the pixel-based are memory-bound on multi-socket machines and so are inefficient and do not scale, whereas LSL, thanks to its RLE compression can scale on such high-end machines. On a 4×15-core machine, and for 8192×8192 images, LSL outperforms its best competitor by a factor ×10.8 and achieves a throughput of 42.4 gigapixel labeled per second

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Section: Benchmark Metricsmentioning

confidence: 99%

Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors

Cabaret

Lacassagne

Etiemble

2016

J Real-Time Image Proc

Self Cite

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“…Furthermore, several collisions were identified during the provisional labeling step and consequently other positions in the table were filled with a logic of one. The collisions in the example of Figure 6a are (1-3), (3)(4), (2)(3)(4)(5)(6), and (4)(5); no matter the order in which they were found. It is worth noting that a collision chain is present (1-3, 3-4, 4-5).…”

Section: D Table For Resolving Label Collisionsmentioning

confidence: 99%

“…It is widely used in several application fields, such as pattern recognition, obstacle detection, and machine learning. CCA processes the output data coming from low-level algorithms, such as binary segmentation, and provides abstract input data to other high-level processing, such as recognition algorithms [2]. The CCA is the combination of two computations: connected component labeling (CCL) and features computation (FC).…”

Section: Introductionmentioning

confidence: 99%

An Efficient Connected Component Labeling Architecture for Embedded Systems

Spagnolo

Frustaci

Perri

et al. 2018

JLPEA

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Connected component analysis is one of the most fundamental steps used in several image processing systems. This technique allows for distinguishing and detecting different objects in images by assigning a unique label to all pixels that refer to the same object. Most of the previous published algorithms have been designed for implementation by software. However, due to the large number of memory accesses and compare, lookup, and control operations when executed on a general-purpose processor, they do not satisfy the speed performance required by the next generation high performance computer vision systems. In this paper, we present the design of a new Connected Component Labeling hardware architecture suitable for high performance heterogeneous image processing of embedded designs. When implemented on a Zynq All Programmable-System on Chip (AP-SOC) 7045 chip, the proposed design allows a throughput rate higher of 220 Mpixels/s to be reached using less than 18,000 LUTs and 5000 FFs, dissipating about 620 µJ.

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“…Based on the above, many CCL algorithms have been proposed. The available algorithms still face several disadvantages such as slow processing time, falling in the pipeline, and requiring a huge amount of memory [12][13][14][15]. The two-pass algorithms are the most popular.…”

Section: Two-pass Algorithmsmentioning

confidence: 99%

A fast and memory-efficient two-pass connected-component labeling algorithm for binary images

Bataineh¹

2019

Turk J Elec Eng & Comp Sci

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Connected-component labeling is an important process in image analysis and pattern recognition. It aims to deduct the connected components by giving a unique label value for each individual component. Many algorithms have been proposed, but they still face several problems such as slow execution time, falling in the pipeline, requiring a huge amount of memory with high resolution, being noisy, and giving irregular images. In this work, a fast and memory- efficient connected-component labeling algorithm for binary images is proposed. The proposed algorithm is based on a new run-base tracing method with a new resolving process to find the final equivalent label values. A set of experiments were conducted on different types of binary images. The proposed algorithm showed high performance compared to the other algorithms.

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A review of world's fastest connected component labeling algorithms: Speed and energy estimation

Cited by 15 publications

References 12 publications

Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors

Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors

An Efficient Connected Component Labeling Architecture for Embedded Systems

A fast and memory-efficient two-pass connected-component labeling algorithm for binary images

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