A run time adaptive architecture to trade-off performance for fault tolerance applied to a DVB on-board processor

Abstract

Reliability is one of the key issues in space applications. Although highly flexible and generally less expensive than predominantly used ASICs, SRAM-based FPGAs are very susceptible to radiation effects. Hence, various fault tolerant techniques have to be applied in order to handle faults and protect the design. This paper presents a reconfigurable onboard processor capable of run-time adaptation to harsh environmental conditions and different functional demands. Run-time reconfigurability is achieved applying two different reconfiguration methodologies. We propose a novel selfreconfigurable architecture able to on demand duplicate or triplicate part of the design in order to form DMR and TMR structures. Moreover, we introduce two different approaches for voting the correct output. The first one is a traditional voter that adapts to different DMR/TMR domain positions whereas the second implies comparing the captured flip-flop values directly from the configuration memory read through ICAP. The comparison is done periodically by an embedded processor thus completely excluding the voting mechanism in hardware. The proposed run-time reconfiguration methodology provides savings in terms of device utilization, reconfiguration time, power consumption and significant reductions in the amount of radhard memory used by partial configurations.

Adaptive reconfigurable voting for enhanced reliability in medium-grained fault tolerant architectures

“…These reconfigurable voters are supported by error counters corresponding to each of the configured domains. Moreover, the voting process is additionally strengthened using the ICAP-based voting [19]. It goes directly to the present state of the configuration memory and compares the predetermined FF values that correspond to the outputs of each partition in every domain.…”

“…It is represented in terms of a reconfigurable DEMUX which forms part of an OBP capable of adapting to different environmental conditions during runtime [19]. Two different reconfiguration strategies are applied including conventional and scalable DPR.…”

“…Although the domains belong to different clock regions, they reside within the same frame and have the same position within that frame. Taking advantage of it, the GCAPTURE command is periodically issued to the ICAP using our modified enhanced HWICAP ( [19], [25]) thus capturing the present state of the configuration memory. Hence, the actual complement value of the outputs is written to their INIT0/INIT1 bits in the configuration memory.…”