Aswitched‐capacitorbased multilevel inverter with reduced circuit components and voltage boosting capability

Abstract

Summary In this paper a novel topology of switched capacitor based multilevel inverters is proposed. In this topology, to increase the output voltage levels and to add the voltage boosting capability, several switched capacitor units are cascaded in series. Having voltage boosting capability and generating maximum number of output voltage levels using minimum number of circuit components, is a merit for this topology. To highlight the attributes of the proposed topology, it is compared with other recently proposed multilevel inverters on number of circuit components such as power electronic switches, diodes and capacitors, voltage boosting capability, total standing voltage, cost and efficiency. The comparison results verify the superiority of the proposed topology over other proposed topologies on number of circuit components, and number of output voltage levels. It is also clear that, this topology has lower voltage stress on power electronic switches, which makes it an appropriate solution for industrial applications. Finally, to show the capabilities of the proposed topology, and to verify the accurate operation of the topology, circuit analysis as well as the experimental results are provided.

An Overview on Multi-Level Inverter Topologies for Grid-Tied PV System

“…Te SUSCMLI topology has a THD value of 3.97%, which is a closer value to the THD of the NAMLI topology for generating the 17-level output voltage [101][102][103][104]. Te THD value of 7.16% is more than the standard range obtained at the 17-level output of NRSSCBMLI topology [105][106][107][108]. Te RSCHMLI topology can generate the 15-level output voltage with an acceptable THD value of 4.36% [109,110].…”

“…Te RSLDMLI topology has a TSV of 16V DC for the output of level 13 [79,87,117]. Te SUSCMLI topology has a TSV of 5.875V DC for generating the output voltage of level 17 [101][102][103][104][105]. Similar to the SUSCMLI topology, the NRSSCBMLI topology also generates a 17-level output voltage with a TSV of 8.993V DC .…”

“…Similar to the SUSCMLI topology, the NRSSCBMLI topology also generates a 17-level output voltage with a TSV of 8.993V DC . TSV per one level (TSV/N L ) for NRSSCBMLI topology is 0.529V DC [105][106][107][108]. Te 19LAMLI topology can generate a 19-level output voltage with a TSV of 60V DC .…”

“…Te SUS-CMLI topology is simulated and obtained an output voltage value of 220 V and an output power of 500 W [101][102][103][104]. Te NRSSCBMLI topology is simulated in diferent conditions and obtained the output values of 96.09 V, 110 V, and 140 V, respectively [105][106][107][108][109]. In [110], Te RSCHMLI obtained the outputs of 229 V, 0.706 A, and 4.36% THD value from simulation.…”

A Seventeen-Level Step-Up Switched-Capacitor-Based Multilevel Inverter With Reduced Charging Current Stress on Capacitors for PV Applications

“…In [32] a new symmetric switched DC structure has been presented with a reduced elements compared to the traditional topologies. In [33], A new switched capacitor-based multilevel inverter with decreased power electronic elements count is introduced, which has the voltage boosting capability using switched capacitor units and applying an appropriate control system. This structure also has another advantage of a decreased voltage stress on power electronic switches.…”