A Selective Harmonic Elimination Method for Five-Level Converters for Distributed Generation

Buccella, Concettina; Cecati, Carlo; Cimoroni, Maria Gabriella; Kulothungan, Gnana Sambandam; Edpuganti, Amarendra; Rathore, Akshay Kumar

doi:10.1109/jestpe.2017.2688726

Cited by 87 publications

(40 citation statements)

References 41 publications

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“…So that the switching angle is selected carefully to avoid/eliminate the odd order harmonics. The SHE technique not only produce the desired switching angle to get output voltage and also minimizes the total harmonic distortion [8]. It also reduces the amount electromagnetic interference and loss due to higher frequency switching.…”

Section: Switching Angle Analysismentioning

confidence: 99%

“…SHE technique is popular and preferable modulation technique for multilevel inverter for low and medium power converters because SHE is operated at low switching frequency in comparison with other PWM techniques, in addition, SHE also improve the quality of the inverter output voltage to obtain low THD [7]. Artificial Neural Network (ANN) is also used to produce switching angle based on the modulation index input by the deriving generalized function [8]. But, the proposed inverter is low rating and to reduce the complexity, ANN is not preferred for the proposed design.…”

Section: Introductionmentioning

confidence: 99%

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Modelling and Implementation of Cascaded Multilevel Inverter as Solar PV Based Microinverter Using FPGA

Premkumar¹,

Rameshkumar²,

Sowmya³

2018

IJIES

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In the field of power electronics, multilevel inverter plays a vital role for power quality improvement. The high switching frequency is used to obtain quality output waveform with a minimum amount of ripple content. The high voltage is reached by using voltage source inverter with almost zero harmonics without series connected switching devices. If the voltage level increased, the harmonic content of the output voltage waveform decreases in multistage converter. In this present work, single phase cascaded nine level inverter is designed for low powered microinverter and switching angles are produced by Selective Harmonic Elimination (SHE) technique. Each bridge in cascaded inverter will produce the output at different levels and allowing an overall nine level AC output voltage. Now-a-days, the solar photovoltaic is connected with microinverter is an efficient way of increasing the performance so that the proposed inverter derives an input from single PV module since it is module level inverter and it can provide good regulation for leads up to their rated capacity. The prototype is designed for 80W rating and the control signals are generated and processed using FPGA controller. The proposed inverter is designed and tested experimentally to verify the theoretical explanations and proposed design delivers high efficiency when compared with the conventional inverter at full load.

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Section: Switching Angle Analysismentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Modelling and Implementation of Cascaded Multilevel Inverter as Solar PV Based Microinverter Using FPGA

Premkumar¹,

Rameshkumar²,

Sowmya³

2018

IJIES

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show abstract

“…Multilevel inverter topologies play an important role for medium‐voltage, medium‐, and high‐power level power system applications, such as static compensators (STATCOM), active shunt filter, and renewable energy integration to grid . It has some promising features such as lower harmonic distortion, lesser dv/dt voltage stresses on power semiconductor devices, requires lower voltage rating devices, high power handling capability, lower switching losses, higher conversion efficiency, producing smaller common mode voltage, and lesser electromagnetic interference (EMI) .…”

Section: Introductionmentioning

confidence: 99%

An improved SHM‐PWM scheme for three‐phase seven‐level CHB inverter to improve power quality by fulfilling CIGRE WG 36‐05 and EN 50160 and sharing equal power between the H‐bridge cells

Kundu

Banerjee

2019

Int Trans Electr Energ Syst

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Summary This paper presents an improved selective harmonic minimization (SHM)‐pulse width modulation (PWM) scheme using three‐phase seven‐level cascaded H‐bridge (CHB) inverter suitable for medium‐voltage distribution systems by achieving high‐quality voltage waveform with least number of switching instances (ie, each power semiconductor devices switched once in a quarter period). Here, each isolated DC voltage sources have been taken as variable and unequal for the CHB inverter. The efficacy of the proposed SHM‐PWM scheme over selective harmonic elimination (SHE)‐PWM scheme and existing SHM‐PWM scheme has been verified through a comparative inverter performance analysis with equal number of switching instances. Both simulation and experimental results prove that the proposed SHM‐PWM scheme ensures equal percentage of power‐sharing between the H‐bridge cells, achieves desired fundamental voltage component, minimizes each individual odd nontriplen harmonics, and limits %total harmonic distortion (THD) up to 25th‐order harmonics such that, it satisfies the power quality standards CIGRE WG 36‐05 and EN 50160 for the entire modulation index range. It is also seen that the proposed scheme requires least no of switching (three) than other reported SHE‐/SHM‐PWM schemes to meet the aforesaid power quality standards. It also results lower inverter losses and improves efficiency compared with conventional schemes. Finally, the scheme is applied to a closed‐loop control of induction motor driven by back‐to‐back PWM‐controlled converter.

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“…An inductor, capacitor and resistor (LCR) circuit are essential for studying resonance phenomena. The resonating LCR circuits have a wide range of applications in designing various electronic devices (Amin et al, 2018;Teymour et al, 2014;Pan et al, 2015;Choi et al, 2015;Li & Xu, 2014;Li et al, 2012;Buccella et al, 2017). Both inductive reactance and capacitive reactance depend on the frequency of the ac source.…”

Section: Introductionmentioning

confidence: 99%

Technique for Measuring Magnitudes and Phases of Voltage and Current in the Band-Selective Parallel LCR Circuit

Lamichhane

2019

J. Inst. Sci. Tech.

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The current in the parallel LCR (inductor, capacitor and resistor) circuit depends not only on the magnitude of the applied electromotive force (emf) but also on its frequency. The circuit current in the parallel LCR circuit becomes very small in the resonating region, but at the same time, the potential difference across the LC tank becomes very large. These results are justified if there is a large induced current in the LC tank in such a way that the inductive and capacitive branch currents are nearly out of phase so that the vector sum of the currents be minimal. This theory can be verified by inserting a small series resistor in each branch. Finally, calculated magnitudes and phases of the potential differences across the newly connected resistors which are directly related to the magnitudes and phases of corresponding branch currents verify the theory.

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A Selective Harmonic Elimination Method for Five-Level Converters for Distributed Generation

Cited by 87 publications

References 41 publications

Modelling and Implementation of Cascaded Multilevel Inverter as Solar PV Based Microinverter Using FPGA

Modelling and Implementation of Cascaded Multilevel Inverter as Solar PV Based Microinverter Using FPGA

An improved SHM‐PWM scheme for three‐phase seven‐level CHB inverter to improve power quality by fulfilling CIGRE WG 36‐05 and EN 50160 and sharing equal power between the H‐bridge cells

Technique for Measuring Magnitudes and Phases of Voltage and Current in the Band-Selective Parallel LCR Circuit

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