2000
DOI: 10.1016/s0038-1101(00)00191-x
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A silicon quantum wire transistor with one-dimensional subband effects

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Cited by 38 publications
(15 citation statements)
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“…For this reason, silicon nanowires, which allow multi-gate or gate-all-around transistors, are being explored. [2][3][4][5][6][7] In Ref. [2], the authors reported a parallel wire channel transistor, whose channel can be viewed as a wire with a triangular cross-section.…”
Section: Introductionmentioning
confidence: 99%
“…For this reason, silicon nanowires, which allow multi-gate or gate-all-around transistors, are being explored. [2][3][4][5][6][7] In Ref. [2], the authors reported a parallel wire channel transistor, whose channel can be viewed as a wire with a triangular cross-section.…”
Section: Introductionmentioning
confidence: 99%
“…Prominent examples include fully depleted silicon on insulator ͑SOI͒ metal-oxidesemiconductor field-effect transistors ͑MOSFETs͒ realized on ultrathin silicon films ͑with thicknesses below 5 nm͒, [4][5][6][7] which are credible device architectures for the sub-50 nm CMOS technologies 8,9 as well as silicon nanowire transistors ͑SNWT͒, which are promising candidates for the ultimate CMOS downscaling. [10][11][12][13][14] In these SOI MOS and nanowire transistors the electron gas is forced to form a quasi-two-dimensional ͑2D͒ or a quasi-one-dimensional ͑1D͒ system in the semiconductor because of the very large confining potential energy produced by the oxide ͑about 3 eV for the case of the SiO 2 -Si system͒, but the electrons within the 2D or the 1D subbands can reach several hundreds of meV, so that a realistic description of the energy dispersion in the quantized system is an essential ingredient for any physically based transport model.…”
Section: Introductionmentioning
confidence: 99%
“…[5][6][7] Despite the nature of the gate, all of these geometries share a common characteristic-they are composed of a thin silicon body sandwiched between insulators and coupled to large source/drain ͑S/D͒ reservoirs. One such device, a double gate ͑DG͒, silicon-on-insulator ͑SOI͒ transistor, is illustrated in Fig.…”
Section: Introductionmentioning
confidence: 99%