A Simple Space Vector PWM Generation Scheme for Any General $n$-Level Inverter

Aneesh, M.A.S.; Gopinath, Anish; Baiju, M. R.

doi:10.1109/tie.2008.2011337

Cited by 163 publications

(43 citation statements)

References 23 publications

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“…Several modulation strategies have been introduced for multilevel inverters including the sinusoidal Pulse Width Modulation (SPWM) [23], [24], space vector PWM [25], selective harmonic elimination [26], hybrid modulation [27], hysteresis modulation [28], and fundamental frequency switching [29]. For the recommended structure, the fundamental switching method is implemented because low switching frequency (nearest level control method, or NLM) is preferable for high power applications [30], as shown in Fig.…”

Section: Simulation and Experimental Resultsmentioning

confidence: 99%

A New Symmetric Cascaded Multilevel Inverter Topology Using Single and Double Source Unit

Ali¹,

Kannan²

2015

Journal of Power Electronics

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In this paper, a new symmetric multilevel inverter is proposed. A simple structure for the cascaded multilevel inverter topology is also proposed, which produces a high number of levels with the application of few power electronic devices. The symmetric multilevel inverter can generate 2n+1 levels with a reduced number of power switches. The basic unit is composed of a single and double source unit (SDS-unit). The application of this SDS-unit is for reducing the number of power electronic components like insulated gate bipolar transistors, freewheeling diodes, gate driver circuits, dc voltage sources, and blocked voltages by switches. Various new algorithms are recommended to determine the magnitude of dc sources in a cascaded structure. Furthermore, the proposed topology is optimized for different goals. The proposed cascaded structure is compared with other similar topologies. For verifying the performance of the proposed basic symmetric and cascaded structure, results from a computer-based MATLAB/Simulink simulation and from experimental hardware are also discussed.

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Section: Simulation and Experimental Resultsmentioning

confidence: 99%

A New Symmetric Cascaded Multilevel Inverter Topology Using Single and Double Source Unit

Ali¹,

Kannan²

2015

Journal of Power Electronics

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“…9 and the nearest three vectors are V 1 (1, -1), V 2 (1, 0) and V 8 (2, -1). The duty cycle for these vectors is calculated by (43).…”

Section: Duty Cycle Calculationmentioning

confidence: 99%

“…A decomposition method was introduced in [41] and also implemented in [42], [43], by which the SV hexagon of three-level inverter is decomposed into six two-level SV hexagons. This method still has huge complications for increased level.…”

Section: Introductionmentioning

confidence: 99%

A Survey on Space-Vector Pulse Width Modulation for Multilevel Inverters

Qamar

Wang

2017

CPSS TPEA

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Abstract-The selection of an appropriate modulation scheme plays a vital role to assure the performance of multilevel inverters. Space vector pulse width modulation (SVPWM) is more efficient among all other pulse width modulation (PWM) techniques due to its key characteristics like better DC voltage utilization, switching losses reduction and easiness in digital implementation. The conventional SVPWM scheme presents some computational complexities due to redundant switching states and large number of space vectors. This paper summarizes five different SVPWM techniques for multilevel inverters which are α-β frame, g-h frame, K-L frame, α'-β' frame and SVPWM based on imaginary coordinate system. g-h frame and K-L frame are based on 60° and 120° coordinates system respectively. To compare the result of these SVPWM schemes, the complex calculations of conventional SVP-WM are converted into simplified line voltages form. The comparison results validate all the SVPWM techniques, but the SVPWM based on imaginary coordinate is found more simple in duty ratio calculations, easier to understand and provides a better control for zero-sequence component for any level of inverter.Index Terms-g-h frame, imaginary coordinate system, K-L frame, multilevel inverters, space vector pulse width modulation (SVPWM), α'-β' frame. I. IntroductIonN OWADAYS, the extensive use of multilevel inverters in high power and high voltage applications has made it a point of attraction for the researchers because of their remarkable performance. As compared with two-level inverters, multilevel inverters have various advantages, e.g. less harmonics in output current and voltages, reduced voltage stress across switching devices, lower dv/dt, better output wave form quality and lower common mode voltages [1], [2]. The diode-clamped 3 level neutral-point clamped (NPC) topology, as shown in Fig. 1 has been the most widely used one among all multilevel inverter topologies that have been proposed in literature [3]- [5].By using an appropriate PWM technique, from discrete voltage levels, multilevel inverters generate the sinusoidal output voltages of different frequencies. Multilevel inverter's output performance depends on modulation algorithm and various PWM algorithms have been developed so far to fulfill the following objectives: less total harmonic distortion (THD), wider linear modulation range, lower switching losses and easy implementation. Among these, the two most popular PWM generation algorithms for multilevel inverters are sinusoidal carrier-based PWM (SPWM) and space vector PWM (SVPWM). In engineering applications, SPWM algorithms maintained their credibility for a long period [6]-[10] but with the development of microcontrollers, SVPWM took place due to its easy digital implementation, better harmonics performance, high DC voltage utilization ratio, reduced switching losses and convenience for capacitor voltage balancing. Moreover, the SVPWM has 15% higher linear modulation range than that of SPWM [11]. However, by increasing the number of...

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“…In Fig. 2, the switching vector (400) is normalized through division by a factor of ( ) L represents the layer of operation and is given by [11] (2)…”

Section: B Modification In the Normalization Factor To Find Switchinmentioning

confidence: 99%

A low computation fractal based voltage space phasor generation for a four level inverter using open-end winding induction motor drive

Shiny¹,

Baiju²

2011

2011 IEEE Ninth International Conference on Power Electronics and Drive Systems

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A Space Vector based Pulse Width Modulation scheme for a 4-level inverter in open-end winding configuration isproposed. An approach based on fractal theory is used to find the sector and the inverter switching vectors. The space vector locations and associated computations are performed in 60° coordinate framework. This representation avoids fractional arithmetic, thereby reducing computational complexity compared to the methods based on Cartesian coordinate system. Mapping to 2-level is used to determine the duration of switching vectors. The scheme is experimentally verified by using a 4-level inverter configuration. 4-level inversion is achieved by connecting two 2-level inverters in open-end winding configuration. The individual inverters are fed with asymmetric DC link voltages. The switching vectors for the two inverters are automatically generated without using look-up tables. The scheme is implemented and tested with a 2-HP openend winding induction motor.

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A Simple Space Vector PWM Generation Scheme for Any General $n$-Level Inverter

Cited by 163 publications

References 23 publications

A New Symmetric Cascaded Multilevel Inverter Topology Using Single and Double Source Unit

A New Symmetric Cascaded Multilevel Inverter Topology Using Single and Double Source Unit

A Survey on Space-Vector Pulse Width Modulation for Multilevel Inverters

A low computation fractal based voltage space phasor generation for a four level inverter using open-end winding induction motor drive

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