A simplification before and during generation methodology for symbolic large-circuit analysis

Abstract

This paper introduces our original implementation of the combination of simplification before and during generation techniques to enable the approximated symbolic analysis of large analog circuits. Special emphasis is paid to the circuit reduction techniques embedded in the simplification before generation module. Experimental results of the application of the symbolic analysis methodology are shown which demonstrate its capability to provide interpretable symbolic expressions.

Efficient DDD-based symbolic analysis of linear analog circuits

“…It is harder to draw a line for the topological simplification techniques. Both [20] and [24] take more simplifying transformations into account than [21]- [23], and should, thus, outperform the latter. In addition [24] is the only algorithm to include the quality of the circuit transformations in the ranking criterion, which results in better end results.…”

“…A technique for directly simplifying the circuit schematic by Guerra, et al [21]- [23] and tries two basic transformations on the circuit: the contraction of nodes and the removal of branches. The transformations are ordered by their impact on the network function, which is recomputed after each applied transformation.…”

Approximation Techniques in Symbolic Circuit Analysis

“…The approach in [15] performs the approximation on the network under analysis directly at the circuit level. It replaces those elements whose contribution (appropriately measured) to the network function is small, by a zero-admittance (element removal) or zero-impedance element (contraction of terminal nodes).…”

“…Another approach that palliates the problems of previous approaches is reported in [44]. To ensure that valid terms are always generated without needing a large number of frequency samples, thus, ensuring that the resulting symbolic expression is as compact as possible, this methodology proceeds as follows.…”

Behavioral Modeling of Mixed-Mode Integrated Circuits

“…An obvious trade-off between the number of frequency samples (directly related to computational time) and the possibility of exceeding the maximum errors between frequency samples exist. An exception is the efficient approach in Guerra et al, 1998;Rodriguez-Garcia et al, 1999), that selects a small set of frequency samples, uses interval analysis techniques to detect if the error is exceeded in some intermediate frequency and new frequency samples are added accordingly. SDG techniques generate symbolic terms in decreasing order of magnitude until the number of terms is enough to model the behavior of the circuit with a given accuracy.…”