A single clock cycle approximate adder with hybrid prediction and error compensation methods

Luo, Li; Chen, Zhe; Yang, Xinghua; Qiao, Fei; Wei, Qi; Yang, Huazhong

doi:10.1016/j.mejo.2019.03.007

Cited by 6 publications

(1 citation statement)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…A configurable low‐power and small‐area multiplier is proposed in [26] using an approximate tree compressor and a carry‐maskable adder to process partial products and realise accumulation. To reduce also the critical path delay, a single clock cycle approximate adder is presented in [27]; a so‐called hybrid prediction is employed to prevent a large error output in the accumulation calculation. Error compensation methods are also used to reduce the error rate (ER).…”

Section: Introductionmentioning

confidence: 99%

Approximate computing using frequency upscaling

Huang¹,

Kumar²,

Abbas³

et al. 2019

IET Circuits, Devices & Systems

View full text Add to dashboard Cite

This study presents frequency upscaling as a technique for developing error resilient arithmetic designs in approximate computing whereby the input signal frequency of the circuit is upscaled beyond its largest operating value in generating errors in the arithmetic operation while speeding up the computational throughput. This study initially presents the mathematical modelling of frequency upscaling for both exact and inexact full adders. An exhaustive simulation and evaluation of 4 and 8 bits subtraction followed by addition of two images and approximate discrete cosine transform (DCT) is pursued using exact and inexact circuits when subjected to the proposed technique. The results estimated using the proposed model show good agreement with the simulation results. The normalised mean error distance of subtraction using an inexact circuit is close to the exact value for different technology nodes. The peak signal-to-noise ratio (PSNR) results for the addition of two images show that the inexact full adder achieves a higher output image quality than the exact circuit when the frequency is scaled up. Also, in an approximate DCT, the input frequency of an inexact full adder can be scaled up significantly higher than an exact full adder without a significant decrease in PSNR value.

show abstract

Section: Introductionmentioning

confidence: 99%