2011 International Conference on Simulation of Semiconductor Processes and Devices 2011
DOI: 10.1109/sispad.2011.6034966
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A smart approach for process variation correlation modeling

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Cited by 4 publications
(2 citation statements)
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“…A pixel size of CMOS array detector should be comparable to its wavelength so that the width of the array detector for real-time imaging at sub-THz is usually bigger than single 6-inch wafer. The devices on the same wafer show the maximum 20% characteristic variation in MOSFET and the maximum 30% characteristic variation in resistors [ 8 ]. Therefore, the fabrication variation of pixels is inevitable.…”
Section: Introductionmentioning
confidence: 99%
“…A pixel size of CMOS array detector should be comparable to its wavelength so that the width of the array detector for real-time imaging at sub-THz is usually bigger than single 6-inch wafer. The devices on the same wafer show the maximum 20% characteristic variation in MOSFET and the maximum 30% characteristic variation in resistors [ 8 ]. Therefore, the fabrication variation of pixels is inevitable.…”
Section: Introductionmentioning
confidence: 99%
“…Accurate and appropriate variation modeling has become one of the critical issues for design enablement [1,2]. The detailed partition for different types of variation sources have been discussed and modeled, including local variation, global variation and variation correlation [3,4]. Traditionally, circuit designers use the corner model to define the worst-case design envelope.…”
Section: Introductionmentioning
confidence: 99%