A software-level Redundant MultiThreading for Soft/Hard Error Detection and Recovery

So, Hwisoo; Didehban, Moslem; Shrivastava, Aviral; Lee, Kyoungwoo

doi:10.23919/date.2019.8715089

Cited by 10 publications

(14 citation statements)

References 16 publications

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“…Also, authors in [16] conclude that the usage of parallelization APIs (Application Programming Interfaces) increases the occurrence of unexpected terminations that are caught by the operating system. In this sense, recent works such as [20] and [21] have presented multi-threaded techniques in environ-ments without operating systems with promising results. In [20], authors show a multi-threaded data triplication technique that improves the fault coverage by 26× while presenting execution overheads less than 8× on average.…”

Section: Introductionmentioning

confidence: 99%

“…In this sense, recent works such as [20] and [21] have presented multi-threaded techniques in environ-ments without operating systems with promising results. In [20], authors show a multi-threaded data triplication technique that improves the fault coverage by 26× while presenting execution overheads less than 8× on average. In [21], a triplication technique is evaluated showing a positive influence on the reduction of error rates.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Multi-Threaded Mitigation of Radiation-Induced Soft Errors in Bare-Metal Embedded Systems

Serrano-Cases¹,

Restrepo-Calle

Cuenca-Asensi³

et al. 2019

J Electron Test

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This article presents a software protection technique against radiation-induced faults which is based on a multi-threaded strategy. Data triplication and instructions flow duplication or triplication techniques are used to improve system reliability and thus, ensure a correct system operation. To achieve this objective, a relaxed lockstep model to synchronize the execution of both, redundant threads and variables under protection on different processing units is defined. The evaluation was performed by means of simulated fault injection campaigns in a multi-core ARM system. Results show that despite being considered techniques that imply an evident overhead in memory and instructions (Duplication With Comparison and Re-Execution -DWC-R and Triple Modular Redundancy -TMR), spreading the replicas in different instruction flows not only produce similar results than classic techniques, but also improves the computational and recovery time in presence of soft-errors. In addition, this paper highlights the importance of protecting memory-allocated data, since the instruction flow triplication is not enough to improve the overall system reliability.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Multi-Threaded Mitigation of Radiation-Induced Soft Errors in Bare-Metal Embedded Systems

Serrano-Cases¹,

Restrepo-Calle

Cuenca-Asensi³

et al. 2019

J Electron Test

View full text Add to dashboard Cite

show abstract

“…In [18], [19] application-level transient fault tolerance models, numbers of n threads compare the parameters at the detection point and use the majority voting principle to correct the wrong result. FISHER [20] points out that fault cannot be aware if it occurs on memory store instructions after the majority voting and presents a compiler level soft error tolerance scheme. The main thread executes memory store instruction first, and then redundant threads read from that memory address to check if the value matches its own.…”

Section: Introductionmentioning

confidence: 99%

“…Under the multiple faults model, fault detection in [18], [19] neither cover memory store instructions nor detect control flow errors. The scheme in [20] treats the whole architectural state as one entity, which can cause wrong soft error recovery, leading to silent data corruption (SDC).…”

Section: Introductionmentioning

confidence: 99%

FERNANDO: A Software Transient Fault Tolerance Approach for Embedded Systems Based on Redundant Multi-Threading

Guo

2021

IEEE Access

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As semiconductor technology scales, modern microprocessors are more vulnerable to transient faults. Software-level fault tolerance schemes are promising because they can improve reliability effectively without extra hardware. Redundant Multi-threading (RMT) uses off-the-shelf cores as redundancy to achieve error resilience. Latest software RMT fault-tolerance models do not effectively cope with transient faults occurring on multiple components during the application execution, resulting in a large number of silent data corruptions (SDC). To address this challenge, we propose FERNANDO, a software-level RMT runtime fault tolerance scheme which provides enhanced error detection and comprehensive error recovery by Triple-Modular Redundancy (TMR). On an ARM Cortex-A57 like simulated microprocessor, we performed probability model transient fault injection experiments in different components of all cores. The results demonstrate that, compared to the state-of-the-art technique, FERNANDO can reduce the SDC rate by about 86.67 percent and optimize the execution time overhead by about 19.64 percent.

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“…To protect embedded systems, many software-implemented CFE detection techniques have been proposed [2,15,18,20,22]. Such techniques add extra control variables and their update instructions to the target programs.…”

Section: Introductionmentioning

confidence: 99%

Using Hardware-In-Loop-Based Fault Injection to Determine the Effects of Control Flow Errors in Industrial Control Programs

Vankeirsbilck

Hallez

Boydens

2020

Lecture Notes in Computer Science

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Embedded systems, which are at the core of many small scale and large scale machines, are affected by external disturbances which can introduce control flow errors. These control flow errors can affect the control program executing on the embedded system, potentially causing sensor signals to be misinterpreted or actuators being miscontrolled. Software-implemented control flow error detection techniques have existed for many years, although there is little literature about these techniques being tested on input/output-driven programs. This paper presents a hardware-in-loop-based fault injection campaign performed on a typical industrial setting, i.e. a small scale factory. Thanks to hardware-in-loop simulation, we can perform the fault injection campaign without the risk of breaking a mechanical or an electrical part. For our fault injection campaign, we considered both the unprotected control program and the version protected with our RACFED error detection technique. The results show that up to 58 % of the injected control flow errors can affect the unprotected control program in a dangerous manner. Implementing RACFED clearly lowers this percentage to less than 4 %, showing this technique can be used in industrial settings.

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A software-level Redundant MultiThreading for Soft/Hard Error Detection and Recovery

Cited by 10 publications

References 16 publications

Multi-Threaded Mitigation of Radiation-Induced Soft Errors in Bare-Metal Embedded Systems

Multi-Threaded Mitigation of Radiation-Induced Soft Errors in Bare-Metal Embedded Systems

FERNANDO: A Software Transient Fault Tolerance Approach for Embedded Systems Based on Redundant Multi-Threading

Using Hardware-In-Loop-Based Fault Injection to Determine the Effects of Control Flow Errors in Industrial Control Programs

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