A study of interface trap generation by Fowler-Nordheim and substrate-hot-carrier stresses for 4-nm thick gate oxides

Shiue, Jao-Hsian; Lee, J.Y.-M.; Chao, Tien−Sheng

doi:10.1109/16.777160

Cited by 26 publications

(4 citation statements)

References 24 publications

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“…6(b). 26) This impact-ionization generated EHP plays an important role in D it generation. 27) However, the EHP in the positive BTS are generated and easily recombine in the Al electrode.…”

Section: Bts Induced Trap Generationmentioning

confidence: 99%

Effect of Bias Temperature Stress on the Anti-Reflection HfO₂ Layer in Complementary Metal Oxide Semiconductor Image Sensors

Kim

Lee

Choi

et al. 2013

Jpn. J. Appl. Phys.

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The effects of various electrical characteristics of HfO2 in CMOS image sensors on bias-thermal stress instability were evaluated. In this work, the HfO2 dielectric layer was used as the anti-reflection layer of image sensors because it had negative charges and could electrically form a p+ layer on a silicon photodiode surface. After the HfO2 layer was stressed with electric field 0.5 MV/cm, 200 °C, and 10 min, there was severe electrical degradation such as +18.8 V flatband voltage shift. In order to investigate this degradation, the oxide trap charges and border trap charges of the HfO2 layer were measured and calculated. Based on these results, the interface trap density and minority carrier generation lifetime, which are directly related to the dark current in CMOS image sensors, were measured. The interface trap density degraded from 4.5×1011 to 1.0×1012 cm-1 eV-1 and the generation lifetime also degraded from 983 to 17 µs after stress application. This trap generated degradation model is suggested for CMOS image sensors. Therefore, pre-stabilization of bias-thermal stress should be implemented to use the HfO2 layer in modern CMOS image sensors.

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“…6(b). 26) This impact-ionization generated EHP plays an important role in D it generation. 27) However, the EHP in the positive BTS are generated and easily recombine in the Al electrode.…”

Section: Bts Induced Trap Generationmentioning

confidence: 99%

Effect of Bias Temperature Stress on the Anti-Reflection HfO₂ Layer in Complementary Metal Oxide Semiconductor Image Sensors

Kim

Lee

Choi

et al. 2013

Jpn. J. Appl. Phys.

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“…The reliability problems inherent in metal-oxidesemiconductor field-effect transistors (MOSFETs) are closely related to defects in gate oxide and at the interface, which are subject to stress-induced leakage current (SILC), temperature bias instability (BTI), hot carrier injection (HCI), and ions radiation [1][2][3][4][5]. These defects can lead to leakage current, breakdown, and other degradations [5][6][7][8][9].…”

Section: Introductionmentioning

confidence: 99%

Impacts of extra charges on trap level modulations atcSi/aSiO₂interface: correlations to leakage current recovery in oxide dielectric

Ma¹,

Wang²,

Wei³

et al. 2020

J. Phys. D: Appl. Phys.

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Reliability issues in metal-oxide-semiconductor field-effect transistor (MOSFET) are closely related to oxide dielectric degradation under electric field stressing, such as stress-induced leakage current (SILC). Some studies show that SILC induced dielectric degradation can be cured by high-temperature annealing while some others show contradictory results. A possible microscopic mechanism could be related to different states of oxygen vacancies in the oxide dielectric because these defects contribute to the leakage current via trap-assisted tunneling (TAT). Here, by first-principles calculations, we demonstrate that the leakage current recovery can be explained in terms of the modulation of trap levels by extra charges. It is found that, with extra holes around the defect, the trap level will be moved far away from the Si valence band and leave the TAT window, which accordingly assists SILC recovery. On the contrary, with extra electrons around the defect, the trap level will be closer to the Si conduction band, having no contribution to the SILC recovery. This study provides a theoretical perspective on the dielectric recovery mechanisms by including the impacts of extra charges.

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“…As NBTI has been one of the most important reliability concerns for modern integrated circuits (ICs) and is receivingmore and more attention, much work has been done on it up to now. The effect of different conditions, such as adding substrate voltage stress [6,7] or drain voltage stress, [8−11] has been studied, and many reasonable models have been brought forward. Woltjer R et al reported that when the gate voltage stress is lower than that of the drain in PMOSFETs, degradation is mainly caused by the generation of negative charges and interface traps caused by electron injection.…”

Section: Introductionmentioning

confidence: 99%

Study on the drain bias effect on negative bias temperature instability degradation of an ultra-short p-channel metal-oxide-semiconductor field-effect transistor

Cao

2010

Chinese Phys. B

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This paper studies the effect of drain bias on ultra-short p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET) degradation during negative bias temperature (NBT) stress. When a relatively large gate voltage is applied, the degradation magnitude is much more than the drain voltage which is the same as the gate voltage supplied, and the time exponent gets larger than that of the NBT instability (NBTI). With decreasing drain voltage, the degradation magnitude and the time exponent all get smaller. At some values of the drain voltage, the degradation magnitude is even smaller than that of NBTI, and when the drain voltage gets small enough, the exhibition of degradation becomes very similar to the NBTI degradation. When a relatively large drain voltage is applied, with decreasing gate voltage, the degradation magnitude gets smaller. However, the time exponent becomes larger. With the help of electric field simulation, this paper concludes that the degradation magnitude is determined by the vertical electric field of the oxide, the amount of hot holes generated by the strong channel lateral electric field at the gate/drain overlap region, and the time exponent is mainly controlled by localized damage caused by the lateral electric field of the oxide in the gate/drain overlap region where hot carriers are produced.

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A study of interface trap generation by Fowler-Nordheim and substrate-hot-carrier stresses for 4-nm thick gate oxides

Cited by 26 publications

References 24 publications

Effect of Bias Temperature Stress on the Anti-Reflection HfO₂ Layer in Complementary Metal Oxide Semiconductor Image Sensors

Effect of Bias Temperature Stress on the Anti-Reflection HfO₂ Layer in Complementary Metal Oxide Semiconductor Image Sensors

Impacts of extra charges on trap level modulations atcSi/aSiO₂interface: correlations to leakage current recovery in oxide dielectric

Study on the drain bias effect on negative bias temperature instability degradation of an ultra-short p-channel metal-oxide-semiconductor field-effect transistor

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A study of interface trap generation by Fowler-Nordheim and substrate-hot-carrier stresses for 4-nm thick gate oxides

Cited by 26 publications

References 24 publications

Effect of Bias Temperature Stress on the Anti-Reflection HfO2 Layer in Complementary Metal Oxide Semiconductor Image Sensors

Effect of Bias Temperature Stress on the Anti-Reflection HfO2 Layer in Complementary Metal Oxide Semiconductor Image Sensors

Impacts of extra charges on trap level modulations atcSi/aSiO2interface: correlations to leakage current recovery in oxide dielectric

Study on the drain bias effect on negative bias temperature instability degradation of an ultra-short p-channel metal-oxide-semiconductor field-effect transistor

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Product

Resources

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Effect of Bias Temperature Stress on the Anti-Reflection HfO₂ Layer in Complementary Metal Oxide Semiconductor Image Sensors

Effect of Bias Temperature Stress on the Anti-Reflection HfO₂ Layer in Complementary Metal Oxide Semiconductor Image Sensors

Impacts of extra charges on trap level modulations atcSi/aSiO₂interface: correlations to leakage current recovery in oxide dielectric