A Study of the Design Architectures of Configurable Processors for the Internet of Things

Background: The Internet of Things (IoT) devices consist of a microcontroller unit for data processing, a low-power wireless radio module for data transmission, and various sensors for data collection. The sensor nodes and processing devices used in the Internet of Things are resource-constrained, with power consumption and security being the two most critical parameters. Objective: This paper addresses the challenges of power consumption and security in IoT scenarios. It presents a low-power and secure heterogeneous multicore sensing architecture designed for lowpower IoT and wireless sensor networks. The architecture comprises a sensing and control subsystem, an information processing unit, and a wireless communication module. Methods: The architecture uses a microcontroller unit based on ARM Cortex M4, a low-power sub-1 GHz RF-compliant communication radio, and a few sensors. The proposed architecture has been implemented and tested using the Contiki Operating System. Results: The implemented sensor node architecture demonstrated performance efficiency, lower energy consumption, and higher security. Conclusion: By leveraging efficient power management, data transmission strategies, and cryptographic security, the architecture contributes to developing energy-efficient and secure IoT devices.

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A Study of the Design Architectures of Configurable Processors for the Internet of Things

Cited by 3 publications

References 10 publications

RV16: An Ultra-Low-Cost Embedded RISC-V Processor Core

RV16: An Ultra-Low-Cost Embedded RISC-V Processor Core

Implementation of Area and Power Optimised ARM Cortex-M Cores on FPGA

Sub-1 GHz RF-based Energy-efficient Sensor Node for Secure Communication in Low-power IoT and Embedded Applications

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