A Study Of Yield Loss In Copper Back-End Process Due To Stress And Poor Adhesion Of The Thin Films

Abstract

Copper as a metal of choice for interconnection purposes, needs damascene approach to realize the interconnect formation. This approach needs etch stop layers to form via and trench. Metal and dielectric barriers are also needed to prevent Copper from diffusing into the substrate. The integrity and adhesion of all these different layers is a subject of great concern from the yield standpoint. The problem needs more careful attention with porous low k dielectric material. In this paper, some aspects related to the adhesion of the various thin films that form the damascene stack are discussed. Analysis of failures/outliers encountered during routine die pull test is also done. The failure analysis performed on such failures provided a very good insight into the weakness in the dielectric stack, that form the interconnect, in the case of device with Copper as back-end metallisation. Techniques to improve the adhesion of various layers and other novel approaches used to improve the process margin are also discussed. Relationship between the die size and stress induced dielectric delamination is also discussed in this paper.