A Submicrowatt Implantable Capacitive Sensor System for Biomedical Applications

Trung, Nguyễn Thành; Häfliger, Philipp

doi:10.1109/tcsii.2014.2368260

Cited by 29 publications

(20 citation statements)

References 11 publications

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“…Depending on how the capacitive sensor is connected to the electronic interface circuit, the interface principles can be categorized as (1) capacitive sensors with a grounded target electrode [9][10][11][12][13] ; (2) capacitive sensors with an active target electrode [14][15][16][17][18][19][20][21][22] ; and (3) capacitive sensors with a floating target electrode. 23,24 It should be mentioned that in all categories, to reduce external interference, the sensor plates need to be connected to the interface via a shielded cable.…”

Section: Discussionmentioning

confidence: 99%

“…A performance summary and a comparison with state-of-the-art interfaces [14][15][16][17][18][19][20][21] are shown in Table 1. The energy efficiency of different interfaces is evaluated by using the two well-known energy efficiency figure-of-merits (FOM) as follows [13][14][15][16][17][18][19][20] :…”

Section: Comparison and Discussionmentioning

confidence: 99%

“…where P D is the power consumption of the interface, T M is the conversion time, and CR and ENOB are the capacitance resolution and effective resolution in bits, which are calculated as [13][14][15][16][17][18][19][20] ENOB ¼…”

Section: Comparison and Discussionmentioning

confidence: 99%

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Design trade‐offs of a capacitance‐to‐voltage converter with a zoom‐in technique for grounded capacitive sensors

Bijargah

Heidary

Torkzadeh

et al. 2018

Circuit Theory & Apps

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This paper presents a low-power, high-precision capacitance-to-voltage converter (CVC) for grounded capacitive sensors. To measure very small capacitance variations in the presence of a large offset capacitance, a new zoom-in structure is proposed. The major non-idealities of the CVC such as the settling error, charge injection, and parasitic capacitance of the switches are minimized through an optimized design. Accordingly, it is shown that the zoom-in technique can significantly reduce many of these errors. The effect of the parasitic capacitances around the sensor capacitance is significantly reduced by using a switched-capacitor-based active-shielding technique. The interface is designed as an integrated circuit using a standard 0.18-μm CMOS technology. Simulation results show that for a sensor capacitor with a nominal value of 10 pF, variation of only 200 fF, and parasitic capacitance of up to 20 pF, a worst-case capacitance error of 0.2 fF can be achieved by taking into account the layout mismatches and the interconnection effects. The achieved latency is 100 μs, and the CVC consumes only 80 μA from a 2-V power supply. The simulated input capacitance resolution for this latency is 123 aF, which is quite close to our calculated resolution (126 aF). This resolution corresponds to an energy efficiency of 9.82 pJ/Step. A temperature sweep simulation has been performed over the temperature range from −45°C to 125°C to demonstrate the small thermal drift of the designed circuit.

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Section: Discussionmentioning

confidence: 99%

Section: Comparison and Discussionmentioning

confidence: 99%

See 1 more Smart Citation

Design trade‐offs of a capacitance‐to‐voltage converter with a zoom‐in technique for grounded capacitive sensors

Bijargah

Heidary

Torkzadeh

et al. 2018

Circuit Theory & Apps

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“…Capacitive sensors are popular in high‐tech industrial and biomedical applications because of their simplicity, compactness, and relatively low cost. Additionally, since they consume no static power, they are also an attractive component for limited energy budget interface circuits . They can be classified as capacitive sensors with an active target electrode and grounded target electrodes .…”

Section: Introductionmentioning

confidence: 99%

An accurate and power‐efficient period‐modulator‐based interface for grounded capacitive sensors

Bijargah

Heidary

Torkzadeh

et al. 2019

Circuit Theory & Apps

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A low-power and high-resolution capacitance-to-period converter (CPC) based on period modulation (PM) for subnanometer displacement measurement systems is proposed. The presented circuit employs the interface developed in a previous work, "a grounded capacitance-to-voltage converter (CVC) based on a zoom-in structure," further improving its performance through a symmetrical design of the applied autocalibration technique. The scheme is based on the use of a relaxation oscillator. To minimize the error contributed by the CPC circuitry, different precision techniques such as chopping, autocalibration, and active shielding are applied. The proposed CPC is realized in a 0.18-μm complementary metal-oxide-semiconductor (CMOS) technology, occupies an area of 0.5 mm 2 , and consumes 135 μA from a 2-V power supply. In order to achieve optimal performance and avoid overdesigning, a noise estimation of various parts of the CPC has been done. Accordingly, for a 10-pF sensor capacitance, the overall CPC demonstrates a capacitance resolution of 0.5 fF for a latency of 128 microseconds, corresponding to an effective number of bits (ENOB) of 12.5 bits and an energy efficiency of 6 pJ/step. The nonlinearity error has been evaluated as well, resulting in a less than 0.03% full-scale span (FSS).

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“…Therefore, it is important to use an implantable human energy harvester, as this would be an efficient alternative source of energy to continuously supply power to implant devices [2]. Since available power is a critical requirement for implantable devices to increase their lifespan, recent research on biomedical implants microsystems has focused on continued down scaling of electronic circuitry to achieve ultra-low power consumption [3]. Due to its ultra-low power consumption and high energy efficiency subthreshold level design has gained interest in the area of low lower design circuits, such as for biomedical implants.…”

Section: Introductionmentioning

confidence: 99%