1986
DOI: 10.1109/jssc.1986.1052587
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A substrate-plate trench-capacitor (SPT) memory cell for dynamic RAM's

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Cited by 52 publications
(6 citation statements)
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“…In developing this new device, the process modeling utilized was widely available [21]. Plasma or dry silicon etching was required to produce accelerometers, but again, this had already been developed for IC manufacturing [33]- [35]. Other capacitive accelerometers borrowed from conventional CMOS or BICMOS processing in the same way [10].…”
Section: Process Designmentioning
confidence: 99%
“…In developing this new device, the process modeling utilized was widely available [21]. Plasma or dry silicon etching was required to produce accelerometers, but again, this had already been developed for IC manufacturing [33]- [35]. Other capacitive accelerometers borrowed from conventional CMOS or BICMOS processing in the same way [10].…”
Section: Process Designmentioning
confidence: 99%
“…A reduction in single-event susceptibility, as well as improved isolation for scaling, can be achieved with the substrate-plate trench capacitor (SPT) cell [47] and sister structures buried-storage electrode (BSE) [48] and trench-..."-"." --"--".,"--* Field Plate -+ Fig.…”
Section: A Cell Designmentioning
confidence: 99%
“…For example, the stacked capacitor arrangement, discussed previously, places the sensitive charge in isolated polysilicon above the substrate or the substrate trench cell with the storage node inside the trench (the buried storage electrode cell [47], [48]), shown in Fig. 9.…”
Section: B Circuit Designmentioning
confidence: 99%
“…This cell structure is referred to as the substrate plate trench (SPT) cell [13]. The capacitor consists of the poly^ilicon storage node electrode which fills the trench, the ONO node dielectric on the trench walls, and the p+ substrate which forms the storage plate.…”
Section: I>-=mentioning
confidence: 99%